Method and system for run-time reallocation of leakage current and dynamic power supply current

Patent metadata

Field	Value
Publication number	US-9335813-B2
Application number	US-201313903744-A
Country	US
Kind code	B2
Filing date	May 28, 2013
Priority date	May 28, 2013
Publication date	May 10, 2016
Grant date	May 10, 2016

Abstract

A method and system for dynamic or run-time reallocation of leakage current and dynamic power supply current of a processor. In one embodiment of the invention, the processor uses the variation in the leakage current of the processor to reduce the maximum current dissipation or power supply current of the processor (ICC max ). By reducing the maximum current dissipation, the system cost can be reduced as a less expensive power delivery system is required in one embodiment of the invention.

First claim

What is claimed is:

1. A processor comprising:
a processing core comprising a protection circuit;
a power control unit coupled with the protection circuit, wherein the power control unit is programmed to provide a dynamic capacitance threshold based at least in part on a leakage current of the processor and a maximum current dissipation of the processor.

2. The processor of claim 1 , wherein the protection circuit is programmed to:
determine whether a dynamic capacitance of the processor exceeds the dynamic capacitance threshold; and
reduce current consumption of the processing core in response to the determination that the dynamic capacitance of the processor has exceeded the dynamic capacitance threshold.

3. The processor of claim 2 , wherein the protection circuit programmed to reduce the current consumption of the processing core in response to the determination that the dynamic capacitance of the processor has exceeded the dynamic capacitance threshold is to perform one or more of a rate throttle of instruction fetch, a reduced number of execution units, and a clock gate of one or more modules in the processor.

4. The processor of claim 2 , wherein the maximum current dissipation of the processor is a sum of a dynamic power supply current limit and the leakage current of the processor, and wherein the dynamic power supply current limit is a product of an operating voltage of the processor, the dynamic capacitance, and a clock frequency of the processor.

5. The processor of claim 4 , wherein the processor is to determine the leakage current based on one or more of a temperature information of the processor, the operating voltage of the processor, and a number of active processing cores of the processor.

6. The processor of claim 5 , wherein the temperature information comprises one or more of a temperature value, a temperature range, an indication of a change in temperature, an indication of a change in temperature above a threshold, of the processor.

7. A system comprising:
a voltage regulator to provide one or more voltages;
a processor coupled with the voltage regulator, the processor comprising:
a processing core comprising a protection circuit;
a power control unit coupled with the protection circuit, wherein the power control unit is programmed to provide a dynamic capacitance threshold based at least in part on a leakage current of the processor and a maximum current dissipation of the processor.

8. The system of claim 7 , wherein the protection circuit is programmed to:
determine whether a dynamic capacitance of the processor exceeds the dynamic capacitance threshold; and
reduce current consumption of the processing core in response to the determination that the dynamic capacitance of the processor has exceeded the dynamic capacitance threshold.

9. The system of claim 8 , wherein the protection circuit programmed to reduce the current consumption of the processing core in response to the determination that the dynamic capacitance of the processor has exceeded the dynamic capacitance threshold is to perform one or more of a rate throttle of instruction fetch, a reduced number of execution units, and a clock gate of one or more modules in the processor.

10. The system of claim 8 , wherein the maximum current dissipation of the processor is a sum of a dynamic power supply current limit and the leakage current of the processor, and wherein the dynamic power supply current limit is a product of an operating voltage of the processor, the dynamic capacitance, and a clock frequency of the processor.

11. The system of claim 10 , wherein the processor is to determine the leakage current based on one or more of a temperature information of the processor, the operating voltage of the processor, and a number of active processing cores of the processor.

12. The system of claim 11 , wherein the temperature information comprises one or more of a temperature value, a temperature range, an indication of a change in temperature, an indication of a change in temperature above a threshold, of the processor.

13. A method comprising:
determining a leakage current of a processor based on one or more of a temperature information of the processor and an operating condition of the processor;
reallocating a dynamic power supply current limit of the processor based at least in part on the determined leakage current; and
determining a dynamic capacitance threshold based at least in part on the reallocated dynamic power supply current limit and the determined leakage current.

14. The method of claim 13 , further comprising:
determining whether a dynamic capacitance of the processor exceeds the dynamic capacitance threshold; and
reducing current consumption of the processor in response to the determination that the dynamic capacitance of the processor has exceeded the dynamic capacitance threshold.

15. The method of claim 14 , wherein reducing the current consumption of the processor comprises performing one or more of throttling a rate of fetching instructions, reducing a number of execution units, and clock gating one or more modules in the processor.

16. The method of claim 13 , wherein the reallocated dynamic power supply current limit is a product of a voltage of the processor, a clock frequency of the processor, and the dynamic capacitance threshold.

17. The method of claim 16 , wherein the dynamic capacitance threshold is a division of, a result of subtracting the determined leakage current from the reallocated dynamic power supply current limit, by the product of the voltage and the clock frequency of the processor.

18. The method of claim 13 , wherein the temperature information comprises one or more of a temperature value, a temperature range, an indication of a change in temperature, an indication of a change in temperature above a threshold, of the processor.

Assignees

• Intel Corp

Inventors

• Burns James S
• Choubal Ashish V
• Raman Arvind
• Van De Groenendaal Johan G

Classifications

• G06F1/206

  comprising thermal management · CPC title

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/3234

  Power saving characterised by the action undertaken · CPC title

• G06F1/3203

  Power management, i.e. event-based initiation of a power-saving mode · CPC title

• G06F1/329

  by task scheduling · CPC title