Persistence filtering in spd arrays
US-2024406582-A1 · Dec 5, 2024 · US
US9331683B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9331683-B2 |
| Application number | US-201414460839-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 15, 2014 |
| Priority date | Mar 17, 2014 |
| Publication date | May 3, 2016 |
| Grant date | May 3, 2016 |
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A ramp signal generator includes a reset control block suitable for generating a switch control signal according to a reset control signal from a control unit; a ramp signal generation block suitable for generating differential ramp signals, which include a power noise or a ground noise as well as a ramp noise; and a common noise canceling unit suitable for being initialized according to the switch control signal, and suitable for canceling common noise through a differential operation between the differential ramp signals.
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What is claimed is: 1. A ramp signal generator comprising: a reset control block suitable for generating a switch control signal according to a reset control signal from a control unit; a ramp signal generation block suitable for generating differential ramp signals, which include a power noise or a ground noise as well as a ramp noise; and a common noise canceling unit suitable for being initialized according to the switch control signal, and suitable for canceling common noise through a differential operation between the differential ramp signals and outputting a ramp signal single-endedly. 2. The ramp signal generator of claim 1 , wherein the common noise cancelling unit comprises a reset switch and an initialization switch, and wherein the switch control signal controls turn-on and turn-off of the reset switch and the initialization switch. 3. The ramp signal generator of claim 1 , wherein the common noise canceling unit comprises a differential amplifier having first and second input nodes, and wherein the ramp signal generation block generates and outputs the differential ramp signals to the first and second input nodes. 4. The ramp signal generator of claim 1 , wherein the common noise canceling unit cancels the common noise including the power noise or the ground noise as well as the ramp noise. 5. The ramp signal generator of claim 1 , wherein the common noise canceling unit is a voltage buffer. 6. The ramp signal generator of claim 1 , wherein the common noise canceling unit comprises: a switching block suitable for initializing a differential amplifier to a level of a common mode voltage provided from a variable common mode voltage generation unit according to the switch control signal; a feedback capacitor block having a feedback capacitor value; a sampling capacitor block suitable for sampling the differential ramp signals; and the differential amplifier suitable for performing a differential operation between the differential ramp signals sampled through the sampling capacitor block, canceling the power noise or the ground noise as well as the ramp noise, and outputting the ramp signal single-endedly. 7. The ramp signal generator of claim 6 , wherein the differential ramp signals are inputted to the first and second input nodes of the differential amplifier, and wherein the common mode voltage is inputted to the second input node of the differential amplifier. 8. A ramp signal generator comprising: a reset control block suitable for generating a switch control signal according to a reset control signal from a control unit; a ramp signal generation block suitable for generating differential ramp signals, which include a power noise or a ground noise as well as a ramp noise; a gain control block suitable for generating a capacitor control signal according to a gain control signal from the control unit; and a common noise canceling unit suitable for being initialized according to the switch control signal, and suitable for differentially amplifying the differential ramp signals according to the capacitor control signal, controlling a voltage gain, and canceling common noise and outputting a ramp signal single-endedly. 9. The ramp signal generator of claim 8 , wherein the common noise cancelling unit comprises a reset switch and an initialization switch, and wherein the switch control signal controls turn-on and turn-off of the reset switch and the initialization switch. 10. The ramp signal generator of claim 8 , wherein the common noise canceling unit comprises a differential amplifier having first and second input nodes, and wherein the ramp signal generation block generates and outputs the differential ramp signals to the first and second input nodes. 11. The ramp signal generator of claim 8 , wherein the common noise cancelling unit comprises first and second feedback capacitors, and first and second sampling capacitors, wherein the first and second feedback capacitors have a feedback capacitor value, and the first and second sampling capacitors have a sampling capacitor value, and wherein the gain control block generates a capacitor control signal for selectively controlling the feedback capacitor value or the sampling capacitor value according to the gain control signal, and selectively outputs the capacitor control signal to the first and second feedback capacitors or the first and second sampling capacitors. 12. The ramp signal generator of claim 8 , wherein the common noise canceling unit differentially amplifies the differential ramp signals at a ratio of a capacitor value controlled according to the capacitor control signal, controls a voltage gain, cancels the common noise including the power noise or the ground noise as well as the ramp noise, and outputs the ramp signal single-endedly. 13. The ramp signal generator of claim 8 , wherein the common noise canceling unit is a programmable gain amplifier (PGA). 14. The ramp signal generator of claim 8 , wherein the common noise canceling unit comprises: a switching block suitable for initializing a differential amplifier to a level of a common mode voltage provided from a variable common mode voltage generation unit according to the switch control signal; a feedback capacitor block having a feedback capacitor value controlled according to the capacitor control signal; a sampling capacitor block suitable for sampling the differential ramp signals; and the differential amplifier suitable for differentially amplifying the differential ramp signals sampled through the sampling capacitor block according to a ratio of a value of the sampling capacitor block and a value of the feedback capacitor block, controlling a voltage gain, canceling the power noise or the ground noise as well as the ramp noise, and outputting the ramp signal single-endedly. 15. The ramp signal generator of claim 14 , wherein the differential ramp signals are inputted to first and second input nodes of the differential amplifier, and wherein the common mode voltage is inputted to the second input node of the differential amplifier. 16. A ramp signal generator comprising: a reset control block suitable for generating a switch control signal according to a reset control signal from a control unit; a ramp signal generation block suitable for generating a ramp signal, which includes a power noise or a ground noise; and a common noise canceling unit suitable for being initialized according to the switch control signal, and suitable for canceling noise through a differential operation between the ramp signal and the power noise or the ground noise and outputting a ramp signal single-endedly. 17. The ramp signal generator of claim 16 , wherein the common noise canceling unit comprises a differential amplifier having first and second input nodes, and wherein the ramp signal generation block generates and outputs the differential ramp signal to the second input node. 18. The ramp signal generator of claim 16 , wherein the noise canceling unit is a voltage buffer. 19. The ramp signal generator of claim 16 , wherein the common noise canceling unit comprises a differential amplifier having first and second input nodes, wherein the ramp signal generation block generates and outputs the differential ramp signal to the second input node, and wherein a power supply or a ground voltage is coupled to the first input node. 20. The ramp signal generator of claim 1 , wherein the ramp signal generation block is a current steering digital-analog
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