High voltage step down regulator with breakdown protection

Patent metadata

Field	Value
Publication number	US-9330776-B2
Application number	US-201414459795-A
Country	US
Kind code	B2
Filing date	Aug 14, 2014
Priority date	Aug 14, 2014
Publication date	May 3, 2016
Grant date	May 3, 2016

Abstract

A high voltage step regulator, such as would be used to provide a regulated low voltage (on the order of a few volts) from a high voltage external supply (e.g. 12V), is presented. To protect the output transistor, through which the output is provided from the input, from breakdown, a depletion type device is connected between the supply and the output transistor. The control gate of the depletion device is then connected to the output level of the regulator. This reduces the voltage drop across the output transistor, helping to avoid violating design rules (EDR) on how great a voltage differential can be placed across the output transistor. Examples of applications for such a circuit are for various operating voltages on a non-volatile memory chip operating with a high voltage power supply.

First claim

It is claimed:

1. A high voltage step-down regulator circuit to provide a regulated low voltage level from a high voltage supply level, comprising:
a high voltage output transistor connected between the high voltage supply level and an output node;
a depletion device through which the high voltage output transistor is connected to the high voltage supply level, wherein a control gate of the depletion device is connected to the output node, thereby reducing a voltage drop across the high voltage output transistor; and
supply control circuitry connected to receive feedback from the output node and set the voltage level on the control gate of the high voltage output transistor to provide the regulated low voltage level on the output node based upon the feedback,
wherein the supply control circuitry comprises:
a voltage divider connected between the output node and ground;
an operational amplifier having a first input connected to a node of the voltage divider and a second input connected to a reference voltage, wherein the voltage level on the control gate of the high voltage output transistor is set based on the output of the operational amplifier;
a supply control transistor whose gate is connected to the output of the operational amplifier;
a high voltage mirror transistor connected between the high voltage supply level and ground through the depletion device and the supply control transistor, respectively, and having a control gate commonly connected with the control gate of the high voltage output transistor to a node between the high voltage mirror transistor and the supply control transistor, and
an adjustable current source connected between the supply control transistor and ground.

2. The high voltage step-down regulator circuit of claim 1 , wherein the high voltage step-down regulator circuit is formed on a monolithic three-dimensional semiconductor memory device in which memory cells are arranged in multiple physical levels above a silicon substrate and comprise a charge storage medium.

3. The high voltage step-down regulator circuit of claim 2 , wherein memory cells of the memory device are formed according to a NAND type architecture.

4. The high voltage step-down regulator circuit of claim 2 , wherein the regulated low voltage level is used for unselected word lines during a sensing operation.

5. The high voltage step-down regulator circuit of claim 2 , wherein the regulated low voltage level is used for unselected word lines during a programming operation.

6. The high voltage step-down regulator circuit of claim 2 , wherein the regulated low voltage level is used for selected word lines during a sensing operation.

7. The high voltage step-down regulator circuit of claim 2 , wherein the regulated low voltage level is used for select gates during a sensing operation.

8. The high voltage step-down regulator circuit of claim 2 , wherein the regulated low voltage level is used for select gates during a programming operation.

9. A high voltage step-down regulator circuit to provide a regulated low voltage level from a high voltage supply level, comprising:
a high voltage output transistor connected between the high voltage supply level and an output node;
a depletion device through which the high voltage output transistor is connected to the high voltage supply level, wherein a control gate of the depletion device is connected to the output node, thereby reducing a voltage drop across the high voltage output transistor; and
supply control circuitry connected to receive feedback from the output node and set the voltage level on the control gate of the high voltage output transistor to provide the regulated low voltage level on the output node based upon the feedback,
wherein the supply control circuitry comprises:
a voltage divider connected between the output node and ground;
an operational amplifier having a first input connected to a node of the voltage divider and a second input connected to a reference voltage, wherein the voltage level on the control gate of the high voltage output transistor is set based on the output of the operational amplifier;
a supply control transistor whose gate is connected to the output of the operational amplifier;
a high voltage mirror transistor connected between the high voltage supply level and ground through the depletion device and the supply control transistor, respectively, and having a control gate commonly connected with the control gate of the high voltage output transistor to a node between the high voltage mirror transistor and the supply control transistor, and
a high voltage NMOS transistor connected between the supply control transistor and the high voltage mirror transistor, wherein control gate of the high voltage mirror transistor is commonly connected with the control gate of the high voltage output transistor to a node between the high voltage mirror transistor and the high voltage NMOS transistor.

10. The high voltage step-down regulator circuit of claim 9 , wherein the high voltage step-down regulator circuit is formed on a monolithic three-dimensional semiconductor memory device in which memory cells are arranged in multiple physical levels above a silicon substrate and comprise a charge storage medium.

11. A high voltage step-down regulator circuit to provide a regulated low voltage level from a high voltage supply level, comprising:
a high voltage output transistor connected between the high voltage supply level and an output node;
a depletion device through which the high voltage output transistor is connected to the high voltage supply level, wherein a control gate of the depletion device is connected to the output node, thereby reducing a voltage drop across the high voltage output transistor; and
supply control circuitry connected to receive feedback from the output node and set the voltage level on the control gate of the high voltage output transistor to provide the regulated low voltage level on the output node based upon the feedback,
wherein the supply control circuitry comprises:
a voltage divider connected between the output node and ground;
an operational amplifier having a first input connected to a node of the voltage divider and a second input connected to a reference voltage, wherein the voltage level on the control gate of the high voltage output transistor is set based on the output of the operational amplifier;
a supply control transistor whose gate is connected to the output of the operational amplifier; and
a high voltage mirror transistor connected between the high voltage supply level and ground through the depletion device and the supply control transistor, respectively, and having a control gate commonly connected with the control gate of the high voltage output transistor to a node between the high voltage mirror transistor and the supply control transistor, wherein the high voltage mirror transistor is sized smaller than the high voltage output transistor.

12. The high voltage step-down regulator circuit of claim 11 , wherein the high voltage output transistor is a PFET device.

13. The high voltage step-down regulator circuit of claim 11 , wherein the voltage difference between the high voltage supply level and the regulated low voltage level is 8 volts or more.

14. The high voltage step-down regulator circuit of claim 11 , wherein the supply control circuitry comprises:
a voltage divider connected between the output node and ground; and
an operational amplifier having a first input connected to a node of the voltage divider and a second input connected to a reference voltage, wherein the voltage level on the control g

Assignees

• Sandisk Technologies Inc

Inventors

• Huynh Jonathan
• Park Jongmin
• Pham Trung

Classifications

• G11C16/30 Primary

  Power supply circuits · CPC title

• G11C16/26

  Sensing or reading circuits; Data output circuits · CPC title

• G11C16/10

  Programming or data input circuits · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title