Branch circuit monitor with paging register

Patent metadata

Field	Value
Publication number	US-9329996-B2
Application number	US-201213406779-A
Country	US
Kind code	B2
Filing date	Feb 28, 2012
Priority date	Apr 27, 2011
Publication date	May 3, 2016
Grant date	May 3, 2016

Abstract

The quantity of data stored in a branch circuit monitor and accessible by a data processing network is increased by logically dividing the monitor's memory into a plurality of registers each comprising a plurality of pages and addressing a page containing the desired data with an address corresponding to the identity of a page number stored in a page register and the identity of the register.

First claim

We claim:

1. A method of storing a datum in a non-transitory computer readable medium, said method comprising the steps of:
(a) storing a page identification in a page register address space identified by an absolute register identifier among a set of available absolute register identifiers of said computer readable medium;
(b) translating a register identification identifying one of said set of absolute register identifications and said page identification to a datum address in said computer readable medium to a page identified by said datum address that is not otherwise addressable by one of said available absolute register identifiers; and
(c) storing said datum in said computer readable medium in a data storage space having said datum address in said page identified by said datum address that is not otherwise addressable, where all of said datum address capable of being created as a result of any said register identification and any said page identification results in a physical address in said computer readable medium that is not shared with any physical address in said computer readable medium of any other datum address, and as a result, of said storing said datum at said physical address in said computer readable medium, is not overwritten with a different datum prior to said storing from another storage and said datum is updated with a different datum as a result of receiving data from at least one of a current sensor and a voltage sensor.

2. The method of storing a datum of claim 1 wherein said register identification identifies a register space in said computer readable medium, said register space comprising a plurality of data storage spaces.

3. A method of retrieving a datum stored in a non-transitory computer readable medium, said method comprising the steps of:
(a) storing a page identification in a page register address space identified by an absolute register identifier among a set of available absolute register identifiers of said computer readable medium;
(b) translating a register identification identifying one of said set of absolute register identifications and said page identification to a datum address in said computer readable medium to a page identified by said datum address that is not otherwise addressable by one of said available absolute register identifiers; and
(c) reading said datum stored in said computer readable medium at a storage space having said datum address in said page identified by said datum address that is not otherwise addressable, where all of said datum address capable of being created as a result of any said register identification and any said page identification results in a physical address in said computer readable medium that is not shared with any physical address in said computer readable medium of any other datum address, and as a result, of said reading said datum at said physical address in said computer readable medium, is not overwritten with a different datum prior to said reading from another storage and said datum is updated with a different datum as a result of receiving data from at least one of a current sensor and a voltage sensor.

4. The method of retrieving a datum of claim 3 wherein said register identification identifies a register space in said computer readable medium, said register space comprising a plurality of data storage spaces.

5. A method for communicating a datum from a first data processing unit to a second data processing unit, said method comprising the steps of:
(a) transmitting a first message comprising a page identification to said first data processing unit;
(b) storing said page identification in a page register address space identified by an absolute register identifier among a set of available absolute register identifiers of a non-transitory medium readable by said first data processing unit;
(c) transmitting an absolute register identification identifying one of a set of absolute register identifications to said first data processing unit;
(d) translating said absolute register identification identifying said one of said set of absolute register identifications and said page identification to a datum address in said readable medium to a page identified by said datum address that is not otherwise addressable by one of said available absolute register identifiers; and
(e) transmitting a datum stored in a data space corresponding to said datum address to said second data processing unit, where all of said datum address capable of being created as a result of any said register identification and any said page identification results in a physical address in said computer readable medium that is not shared with any physical address in said computer readable medium of any other datum address, and as a result, of said transmitting said datum at said physical address in said computer readable medium, is not overwritten with a different datum prior to said transmitting from another storage and said datum is updated with a different datum as a result of receiving data from at least one of a current sensor and a voltage sensor.

6. The method of communicating a datum of claim 5 wherein said register identification identifies a register space in said medium readable by said first data processing unit, said register space comprising a plurality of data storage spaces.

Assignees

• Cook Martin
• Bitsch Michael
• Veris Industries Llc

Inventors

• Cook Martin
• Bitsch Michael

Classifications

• G06F12/0623 Primary

  for memory modules · CPC title

• G06F12/06

  Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication (G06F12/08 takes precedence) · CPC title

• G06F12/02

  Addressing or allocation; Relocation (program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00) · CPC title