Synchronous display method of spliced display screen, and timing controller and spliced display screen using the same

Patent metadata

Field	Value
Publication number	US-9329829-B2
Application number	US-201414316182-A
Country	US
Kind code	B2
Filing date	Jun 26, 2014
Priority date	Feb 20, 2014
Publication date	May 3, 2016
Grant date	May 3, 2016

Abstract

The disclosure provides a synchronous display method of an spliced display screen which comprises at least two spliced display units and at least two timing controllers respectively corresponding to the spliced display units, wherein the method comprises steps of: receiving, by each timing controller, a timing control signal for a current frame of the corresponding spliced display unit, feedback from the spliced display unit corresponding to the timing controller; determining, by each timing controller, a phase difference between the timing control signal for the current frame of the corresponding spliced display unit and a reference timing control signal received by the timing controller; judging, by each timing controller, whether or not the phase difference goes beyond a predetermined threshold range; if it is judged that the phase difference goes beyond the predetermined threshold range, generating a phase adjustment value, by the timing controller, based on the phase difference, wherein the phase adjustment value is less than the phase difference; generating, by each timing controller, a next timing control signal for a next frame of the corresponding spliced display unit, based on the phase adjustment value, so that a next phase difference between the next timing control signal for the next frame and the reference timing control signal is the phase adjustment value; and outputting the next timing control signal for the next frame to the corresponding spliced display unit. Meanwhile, the disclosure also provides a timing controller used in this synchronous display method and a spliced display screen to which this synchronous display method is applied.

First claim

What is claimed is:

1. A synchronous display method of a spliced display screen which comprises at least two spliced display units and at least two timing controllers respectively corresponding to the spliced display units, the method comprising steps of:
receiving, by each timing controller, a timing control signal for a current frame of a spliced display unit corresponding to the timing controller, feedback from the corresponding spliced display unit;
determining, by each timing controller, a phase difference between the timing control signal for the current frame of the corresponding spliced display unit and a reference timing control signal received by the timing controller;
judging, by each timing controller, whether or not the phase difference goes beyond a predetermined threshold range;
if it is judged that the phase difference goes beyond the predetermined threshold range, generating a phase adjustment value by the timing controller based on the phase difference, wherein the phase adjustment value is less than the phase difference;
generating, by each timing controller, a next timing control signal for a next frame of the corresponding spliced display unit based on the phase adjustment value, so that a next phase difference between the next timing control signal for the next frame and the reference timing control signal is equal to the phase adjustment value; and
outputting the generated next timing control signal for the next frame to the corresponding spliced display unit.

2. The synchronous display method of the spliced display screen according to claim 1 , wherein the step of generating the phase adjustment value further comprises:
obtaining the phase adjustment value by multiplying the phase difference by a predetermined coefficient which is greater than zero but less than 1.

3. The synchronous display method of the spliced display screen according to claim 1 , further comprising:
if it is judged that the phase difference is within the predetermined threshold range,
directly generating, by each timing controller, the next timing control signal for the next frame of the corresponding spliced display unit, so that the next phase difference between the next timing control signal for the next frame and the reference timing control signal equals to the phase difference between the timing control signal for the current frame and the reference timing control signal; and
outputting the generated next timing control signal to the corresponding spliced display unit.

4. The synchronous display method of the spliced display screen according to claim 1 , wherein a timing control signal detection unit is disposed within a display panel in each spliced display unit, and wherein the step of receiving the timing control signal for the current frame further comprises:
receiving, by each timing controller, the timing control signal for the current frame of the spliced display unit corresponding to the timing controller, feedback from the timing control signal detection unit disposed within the display panel of the corresponding spliced display unit.

5. A timing controller for use in a spliced display screen, the timing controller comprising:
a receiving unit configured to receive a timing control signal for a current frame of a spliced display unit of the spliced display screen corresponding to the timing controller feedback from the spliced display unit, and a reference timing control signal;
a first processing unit configured to determine a phase difference between the timing control signal for the current frame of the corresponding spliced display unit and the reference timing control signal received by the receiving unit;
a second processing unit configured to judge whether or not the phase difference goes beyond a predetermined threshold range;
a third processing unit configured to, if it is judged that the phase difference goes beyond the predetermined threshold range, generate a phase adjustment value based on the phase difference, wherein the phase adjustment value is less than the phase difference;
a fourth processing unit configured to generate a next timing control signal for a next frame of the corresponding spliced display unit based on the phase adjustment value, so that a next phase difference between the next timing control signal for the next frame and the reference timing control signal is equal to the phase adjustment value; and
a sending unit configured to output the next timing control signal for the next frame to the corresponding spliced display unit.

6. The timing controller according to claim 5 , wherein the third processing unit is further configured to, if it is judged that the phase difference goes beyond the predetermined threshold range, obtain the phase adjustment value by multiplying the phase difference by a predetermined coefficient which is greater than zero but less than 1.

7. The timing controller according to claim 5 , wherein the fourth processing unit is further configured to, if it is judged that the phase difference is within the predetermined threshold range, directly generate the next timing control signal for the next frame of the corresponding spliced display unit, so that the next phase difference between the next timing control signal for the next frame and the reference timing control signal equals to the phase difference between the timing control signal for the current frame and the reference timing control signal.

8. A spliced display screen comprising at least two spliced display units, and at least two timing controllers according to claim 5 , corresponding to the spliced display units respectively.

9. The spliced display screen according to claim 8 , wherein a timing control signal detection unit is disposed within a display panel in each spliced display unit and is configured to detect the timing control signal for the current frame of the corresponding spliced display unit, and to send the timing control signal for the current frame of the corresponding spliced display unit to the corresponding timing controller.

10. The spliced display screen according to claim 9 , wherein, in the each spliced display unit, the display panel comprises a transmittance region and a shading region, wherein the timing control signal detection unit is disposed in the shading region.

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Yu Yangbing
• Hu Weihao
• Keun Yoon Dae
• Liao Yanping
• Shao Xibin
• Liu Lei
• He Zongze

Classifications

• G06F3/1438

  using more than one graphics controller · CPC title

• G09G5/003

  Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto (specific for a CRT G09G1/165; for a flat panel G09G3/2092) · CPC title

• G06T1/20

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G09G5/12

  Synchronisation between the display unit and other units, e.g. other display units, video-disc players · CPC title

• G09G5/008

  Clock recovery · CPC title