Bandgap with thermal drift correction

Patent metadata

Field	Value
Publication number	US-9329614-B1
Application number	US-201313837830-A
Country	US
Kind code	B1
Filing date	Mar 15, 2013
Priority date	Jul 31, 2012
Publication date	May 3, 2016
Grant date	May 3, 2016

Abstract

In one embodiment a heating mechanism is provided with an integrated circuit for testing and calibration purposes. During production testing, heating elements may be activated in order to quickly bring an integrated circuit up to operating temperature for temperature testing or calibration. Once the operating test temperature has been reached, the circuit can be quickly and easily tested to show it is operable within the design temperature range and/or to obtain calibration data to correct for temperature drift. Calibration data may be used to create correction data, which may be stored within the integrated circuit. During normal operation, the correction data may be used to compensate for variations in operation due to temperature.

First claim

We claim:

1. An integrated circuit having at least one component whose operation varies with temperature, the integrated circuit comprising:
at least one heating element, located on the integrated circuit substrate as part of the integrated circuit, configured to heat the entire integrated circuit in a test mode and to remain off in a run mode;
a temperature measuring device, located on the integrated circuit, configured to operate in at least the test mode and the run mode, the temperature measuring device configured to generate temperature data for temperature calibration when in the test mode and for temperature compensation when in the run mode;
a memory configured to receive the temperature data and store temperature compensation data in the test mode and configured to receive the temperature data and output temperature correction data in the run mode,
a temperature correction circuit coupled to the temperature measuring device and the memory, configured to receive temperature data from the temperature measuring device and temperature correction data from the memory when in the run mode, and configured to correct operation of the at least one component whose operation varies with temperature, in response to the temperature data and temperature correction data,
wherein the at least one heating element comprises a plurality of rail clamp transistors located on a periphery of the integrated circuit substrate.

2. The integrated circuit of claim 1 , wherein the plurality of rail clamp transistors located on the periphery of the integrated circuit substrate are configured to activate in the test mode in response to a test code input to the integrated circuit, to heat the integrated circuit.

3. The integrated circuit of claim 2 , wherein the temperature measuring device comprises one bipolar junction transistor and the temperature signal comprises a voltage between a base and emitter of the bipolar junction transistor,
wherein when the plurality of rail clamp transistors located on the periphery of the integrated circuit substrate are activated in the test mode in response to a test code input to the integrated circuit, the integrated circuit is continuously heated such that temperature of the integrated circuit increases, and temperature compensation data is stored in the memory at predetermined temperature points as the temperature of the integrated circuit increases.

4. The integrated circuit of claim 1 , wherein the integrated circuit includes a bandgap voltage reference, configured to output a voltage signal Vref which varies with temperature, the temperature correction circuit configured to receive temperature data from the temperature measuring device and temperature correction data from the memory when in the run mode, and configured to digitally correct the voltage signal Vref from the bandgap voltage reference in response to the temperature data and temperature correction data.

5. The integrated circuit of claim 1 , wherein the integrated circuit comprises an oscillator configured to output an oscillating signal having a reference frequency f which varies with temperature, the temperature correction circuit configured to receive temperature data from the temperature measuring device and temperature correction data from the memory when in the run mode, and configured to correct the reference frequency f from the oscillator in response to the temperature data and temperature correction data.

6. The integrated circuit of claim 1 , wherein the integrated circuit comprises an analog-to-digital converter having a gain g which varies with temperature, the temperature correction circuit configured to receive temperature data from the temperature measuring device and temperature correction data from the memory when in the run mode, and configured to digitally correct the gain g of the analog-to-digital converter in response to the temperature data and temperature correction data.

7. The integrated circuit of claim 1 , wherein the integrated circuit comprises a digital-to-analog converter having a gain g which varies with temperature, the temperature correction circuit configured to receive temperature data from the temperature measuring device and temperature correction data from the memory when in the run mode, and configured to digitally correct the gain g of the digital-to-analog converter in response to the temperature data and temperature correction data.

8. The integrated circuit of claim 1 , wherein the temperature measuring device comprises a first temperature sensing device located on the integrated circuit, configured to output temperature data of the entire integrated circuit in a test mode and a second temperature measuring device located on the integrated circuit, configured to output temperature data of the entire integrated circuit in a run mode.

9. The integrated circuit of claim 1 , wherein the temperature measuring device comprises a single temperature measurement device located on the integrated circuit, configured to output temperature data for the entire integrated circuit in both the test mode and the run mode.

10. The integrated circuit of claim 1 , wherein the temperature measuring device located on the integrated circuit, is configured to output temperature data for the entire integrated circuit external to the integrated circuit for temperature calibration when in test mode and internally within the integrated circuit for temperature correction when in run mode.

11. A semiconductor device, comprising:
an integrated circuit formed on a semiconductor substrate, the integrated circuit having at least one component whose operation varies with temperature, and
at least one testing heating element formed on the semiconductor substrate configured to continuously heat the entire semiconductor device through a temperature range only during an initial testing period; and
a memory configured to store temperature and operation data from the initial testing period as the entire semiconductor device is continuously heated by the at least one heating element, to correct operation of the at least one component whose operation varies with temperature, during a later run period,
wherein the at least one heating element formed on the semiconductor substrate is configured to heat the entire integrated circuit through a range of temperature values during the initial testing period such that voltage from the bandgm voltage reference is measured through the range of temperature values as the semiconductor device is heated by the at least one heating element to produce a plurality of voltage values.

12. The semiconductor device of claim 11 , further comprising:
a single temperature sensor on the semiconductor device, configured to monitor temperature of the entire semiconductor device.

13. The semiconductor device of claim 11 , wherein the integrated circuit includes a bandgap voltage reference.

14. The semiconductor device of claim 11 , wherein the memory is configured to store digital correction data representing a voltage calibration curve generated from the plurality of voltage values during the initial testing period.

15. The semiconductor device of claim 14 , wherein the integrated circuit is configured to apply the digital correction data stored in the memory and is configured to correct operation of the integrated circuit to compensate for variation in the reference voltage signal from the bandgap voltage reference during the later run period.

16. The semiconductor device of claim 15 , wherein the digital correction data comprises coefficients of a pre-determined polynomial of a predetermined

Assignees

• Cirrus Logic Inc

Inventors

• Drakshapalli Prashanth
• Melanson John L
• Holley Rod
• Rengachari Thirumalai
• Jiang Ruoxin
• Swanson Eric

Classifications

• H10P74/277

  Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title

• G05F3/02 Primary

  Regulating voltage or current · CPC title

• G01R31/31701

  Arrangements for setting the Unit Under Test [UUT] in a test mode · CPC title

• G01R31/3004

  Current or voltage test · CPC title

• H01L22/34

  Electricity · mapped topic