Method for manufacturing a die assembly having a small thickness and die assembly relating thereto

Patent metadata

Field	Value
Publication number	US-9327964-B2
Application number	US-201414524661-A
Country	US
Kind code	B2
Filing date	Oct 27, 2014
Priority date	Oct 31, 2013
Publication date	May 3, 2016
Grant date	May 3, 2016

Abstract

A method for manufacturing a die assembly, including the steps of: bonding a first wafer of semiconductor material to a second wafer, the second wafer including a respective semiconductor body having a respective initial thickness and forming an integrated electronic circuit; and subsequently reducing the initial thickness of the semiconductor body of the second wafer; and subsequently bonding the second wafer to a third wafer, the third wafer forming a micro-electromechanical sensing structure.

First claim

The invention claimed is:

1. A die assembly comprising:
a first die including a semiconductor body and an integrated electronic circuit and having first and second sides that extend between first and second surfaces;
a recess formed in the first surface of the first die;
a second die of semiconductor material bonded to the second surface of the first die, the second die not including electrical functions and providing stiffening structural support to the first die;
a third die bonded to the first surface of the first die, the first die being arranged between the second and third dice, the third die including a micro-electromechanical sensing structure; and
a molding compound coating the first and second sides of the first die.

2. The assembly according to claim 1 , wherein the integrated electronic circuit is electrically coupled to the micro-electromechanical sensing structure, the second die being mechanically coupled to the first and third dice and configured to not receive electrical signals generated by the first die or the third die.

3. The assembly according to claim 1 , wherein the second die is not electrically coupled to the first and third dice.

4. The assembly according to claim 1 , wherein the second die has a thickness between 20 μm and 100 μm.

5. The assembly according to claim 1 , wherein the semiconductor body of the first die has a thickness between 50 μm and 150 μm.

6. The assembly according to claim 1 , wherein the second die is made entirely of semiconductor material.

7. The assembly according to claim 1 , wherein the first die includes a first pad of conductive material, and wherein the third die includes a second pad of conductive material; the assembly further comprising a first wire bonding that electrically connects the first pad to the second pad, the first wire bonding having a maximum height that is greater than a maximum height of the second die.

8. A package comprising:
an assembly including:
a first semiconductor die having a first surface and a second surface, the first die including an integrated electronic circuit;
a second die of semiconductor material bonded to the first surface of the first die, the second die not including electrical structures; and
a third die bonded to the second surface the first die, the first die being arranged between the second and third dice, the third die including a micro-electromechanical sensing structure;

a first conductive wire electrically coupling the first die to the third die; and
molding compound around side portions of the first, second, and third dice and the first conductive wire.

9. The package of claim 8 , further comprising:
a supporting structure coupled to a surface of the third die; and
a second conductive wire electrically coupling the first die to the supporting structure, the second conductive wire having a maximum height that is greater than a maximum height of the second die.

10. The package of claim 9 , further comprising:
a plurality of bond pads on the second surface of the first die; and
an outer perimeter of the second die being between the plurality of bond pads.

11. The die assembly of claim 1 , further comprising:
a plurality of bond pads on the first surface of the first die; and
an outer perimeter of the second die being between the plurality of bond pads.

Assignees

• St Microelectronics Srl

Inventors

• Allegato Giorgio
• Ferrera Marco
• Garavaglia Matteo
• Corso Lorenzo

Classifications

• B81B2207/097

  Interconnects arranged on the substrate or the lid, and covered by the package seal · CPC title

• B81B2207/012

  the micromechanical device and the control or processing electronics being separate parts in the same package · CPC title

• B81C1/00238 Primary

  Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure · CPC title

• B81C2203/0792

  Forming interconnections between the electronic processing unit and the micromechanical structure · CPC title

• B81B7/0074 Primary

  3D packaging, i.e. encapsulation containing one or several MEMS devices arranged in planes non-parallel to the mounting board · CPC title