Display device comprising an oxide semiconductor

Patent metadata

Field	Value
Publication number	US-9324874-B2
Application number	US-56812009-A
Country	US
Kind code	B2
Filing date	Sep 28, 2009
Priority date	Oct 3, 2008
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs.

First claim

What is claimed is:

1. A display device comprising a pixel portion and a driver circuit,
wherein the pixel portion comprises a first thin film transistor including a first oxide semiconductor layer and a first channel protective layer in contact with the first oxide semiconductor layer,
wherein the driver circuit comprises:
a second thin film transistor including a gate insulating layer, a second oxide semiconductor layer and a second channel protective layer in contact with the second oxide semiconductor layer;
a third thin film transistor including a third oxide semiconductor layer and a third channel protective layer in contact with the third oxide semiconductor layer;
a first conductive layer including a first portion over and in electrical contact with the third oxide semiconductor layer and a second portion over and in electrical contact with the second oxide semiconductor layer, wherein the first portion serves as one of source and drain electrodes of the third thin film transistor and the second portion serves as one of source and drain electrodes of the second thin film transistor; and
a second conductive layer including a third portion over and in direct contact with a vertical side surface of the second oxide semiconductor layer and a fourth portion over and in direct contact with a gate electrode of the second thin film transistor, wherein the third portion serves as the other of the source and drain electrodes of the second thin film transistor, and

wherein the third portion and the gate electrode of the second thin film transistor overlap each other.

2. The display device according to claim 1 , wherein the second thin film transistor is a depletion type transistor and the third thin film transistor is an enhancement type transistor.

3. The display device according to claim 1 , wherein the second thin film transistor and the third thin film transistor are enhancement type transistors.

4. The display device according to claim 1 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer comprise indium, gallium and zinc.

5. The display device according to claim 1 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer comprise indium, gallium, zinc and a metal, the metal being different from indium, gallium, and zinc.

6. The display device according to claim 1 , wherein the second conductive layer is in electrical contact with the gate electrode of the second thin film transistor through a contact hole of the gate insulating layer.

7. The display device according to claim 1 , wherein the fourth portion and the gate electrode of the second thin film transistor overlap each other.

8. A display device comprising a pixel portion and a driver circuit,
wherein the pixel portion comprises a first thin film transistor including a first oxide semiconductor layer and a first channel protective layer in contact with the first oxide semiconductor layer,
wherein the driver circuit comprises:
a second thin film transistor including a gate insulating layer, a second oxide semiconductor layer and a second channel protective layer in contact with the second oxide semiconductor layer;
a third thin film transistor including a third oxide semiconductor layer and a third channel protective layer in contact with the third oxide semiconductor layer;
a first conductive layer including a first portion over and in electrical contact with the third oxide semiconductor layer and a second portion over and in electrical contact with the second oxide semiconductor layer, wherein the first portion serves as one of source and drain electrodes of the third thin film transistor and the second portion serves as one of source and drain electrodes of the second thin film transistor; and
a second conductive layer including a third portion over and in direct contact with a vertical side surface of the second oxide semiconductor layer and a fourth portion over and in direct contact with a gate electrode of the second thin film transistor, wherein the third portion serves as the other of the source and drain electrodes of the second thin film transistor,

wherein a fourth oxide semiconductor layer having smaller thickness and higher conductivity than that of the third oxide semiconductor layer is provided between the first conductive layer and the third oxide semiconductor layer, and
wherein the third portion and the gate electrode of the second thin film transistor overlap each other.

9. The display device according to claim 8 , wherein the second thin film transistor is a depletion type transistor and the third thin film transistor is an enhancement type transistor.

10. The display device according to claim 8 , wherein the second thin film transistor and the third thin film transistor are enhancement type transistors.

11. The display device according to claim 8 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer comprise indium, gallium and zinc.

12. The display device according to claim 8 , wherein the fourth oxide semiconductor layer comprises indium, gallium and zinc.

13. The display device according to claim 8 , wherein the second conductive layer is in electrical contact with the gate electrode of the second thin film transistor through a contact hole of the gate insulating layer.

14. The display device according to claim 8 , wherein the fourth portion and the gate electrode of the second thin film transistor overlap each other.

15. A display device comprising a pixel portion and a driver circuit,
wherein the pixel portion comprises a first thin film transistor including a first oxide semiconductor layer and a first channel protective layer in contact with the first oxide semiconductor layer,
wherein the driver circuit comprises:
a second thin film transistor including a gate insulating layer, a second oxide semiconductor layer and a second channel protective layer in contact with the second oxide semiconductor layer;
a third thin film transistor including a third oxide semiconductor layer and a third channel protective layer in contact with the third oxide semiconductor layer;
a first conductive layer including a first portion over and in electrical contact with the third oxide semiconductor layer and a second portion over and in electrical contact with the second oxide semiconductor layer, wherein the first portion serves as one of source and drain electrodes of the third thin film transistor and the second portion serves as one of source and drain electrodes of the second thin film transistor; and
a second conductive layer including a third portion over and in direct contact with a vertical side surface of the second oxide semiconductor layer and a fourth portion over and in direct contact with a gate electrode of the second thin film transistor, wherein the third portion serves as the other of the source and drain electrodes of the second thin film transistor,

wherein an insulating layer covers the first thin film transistor, the second thin film transistor, and the third thin film transistor and is in contact with the first channel protective layer, the second channel protective layer, and the third channel protective layer, and
wherein the third portion and the gate electrode of the second thin film transistor overlap each other.

16. The display device according to claim 15 , wherein the second thin film transistor is a depletion type transistor and the third thin film transistor is an enhancem

Assignees

• Yamazaki Shunpei
• Akimoto Kengo
• Umezaki Atsushi
• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Akimoto Kengo
• Umezaki Atsushi

Classifications

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60 Primary

  wherein the TFTs are in active matrices · CPC title

• H10D86/40

  characterised by multiple TFTs · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D64/512

  Disposition of the gate electrodes, e.g. buried gates · CPC title