FinFET including varied fin height

Patent metadata

Field	Value
Publication number	US-9324792-B1
Application number	US-201514674145-A
Country	US
Kind code	B1
Filing date	Mar 31, 2015
Priority date	Mar 31, 2015
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

According to another embodiment, a semiconductor finFET device includes a semiconductor substrate. The finFET device further includes at least one first semiconductor fin on the semiconductor substrate. The first semiconductor fin comprises a first semiconductor portion extending to a first fin top to define a first height, and a first insulator portion interposed between the first semiconductor portion and the semiconductor substrate. A second semiconductor fin on the semiconductor substrate has a second semiconductor portion extending to a second fin top to define a second height, and a second insulator portion interposed between the second semiconductor portion and the semiconductor substrate, the second height being different from the first height.

First claim

What is claimed is:

1. A semiconductor finFET device comprising:
a semiconductor substrate;
at least one first semiconductor fin on the semiconductor substrate, the at least one first semiconductor fin comprising a first semiconductor portion extending to a first fin top to define a first height, and a first insulator portion interposed between the first semiconductor portion and the semiconductor substrate;
first epitaxy source/drain contacts having a first contact height on the at least one first semiconductor fin;
at least one second semiconductor fin on the semiconductor substrate, the at least one second semiconductor fin comprising a second semiconductor portion extending to a second fin top to define a second height, and a second insulator portion interposed between the second semiconductor portion and the semiconductor substrate, the second height being different from the first height; and
second epitaxy source/drain contacts having a second contact height on the at least one second semiconductor fin, the second contact height being less than the first contact height.

2. The semiconductor finFET of claim 1 , wherein a combination of the first semiconductor portion and the first insulator portion defines a first total height of the at least one first semiconductor fin, and a combination of the second semiconductor portion and the second insulator portion defines a second total height of the at least one second semiconductor fin, the second total height being substantially equal to the first total height.

3. The semiconductor finFET of claim 2 , wherein the first semiconductor portion comprises a first semiconductor material and the second semiconductor portion comprises a second semiconductor material different from the first semiconductor material.

4. The semiconductor finFET of claim 3 , wherein the second height is less than the first height.

5. A semiconductor finFET device comprising:
a semiconductor substrate;
at least one first semiconductor fin on the semiconductor substrate, the at least one first semiconductor fin comprising a first semiconductor portion extending to a first fin top to define a first height, and a first insulator portion interposed between the first semiconductor portion and the semiconductor substrate;
first epitaxy source/drain contacts having a first contact height on the at least one first semiconductor fin;
at least one second semiconductor fin on the semiconductor substrate, the at least one second semiconductor fin comprising a second semiconductor portion extending to a second fin top to define a second height, and a second insulator portion interposed between the second semiconductor portion and the semiconductor substrate, the second height being different from the first height; and
second epitaxy source/drain contacts having a second contact height on the at least one second semiconductor fin, the second contact height being greater than the first contact height.

6. The semiconductor finFET of claim 5 , wherein the second height is greater than the first height.

Assignees

• IBM

Inventors

• Cao Qing
• Cheng Kangguo
• Li Zhengwen
• Liu Fei

Classifications

• H10P50/242

  of Group IV materials · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10D86/215

  comprising FinFETs · CPC title

• H10D86/011 Primary

  comprising FinFETs · CPC title

• H10D84/0193

  the components including FinFETs · CPC title