Semiconductor device and method of fabricating the same

Patent metadata

Field	Value
Publication number	US-9324619-B2
Application number	US-201514814601-A
Country	US
Kind code	B2
Filing date	Jul 31, 2015
Priority date	Aug 25, 2014
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.

First claim

What is claimed is:

1. A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions, the method comprising:
providing a substrate spanning the first, second, and third regions;
forming first preliminary active patterns and second preliminary active patterns on the substrate such that the first and second preliminary active patterns protrude from the substrate, the first preliminary active patterns extending from the first region into the third region so as to overlap the substrate in the third region, and the second preliminary active patterns extending from the second region into the third region so as to also overlap the substrate in the third region;
forming mask patterns on the substrate in the first and second regions but not in the third region thereby leaving the substrate exposed in the third region;
performing a first etching process comprising etching the first and second preliminary active patterns using the mask patterns as an etch mask to form first and second active patterns from the first and second preliminary active patterns, respectively; and
forming gate structures on the substrate, the gate structures comprising a first gate structure crossing the first active patterns and a second gate structure crossing the second active patterns,
wherein the first active patterns extend longitudinally in a first direction and are spaced apart from each other in a second direction crossing the first direction,
the second active patterns extend in the first direction and are spaced apart from each other in the second direction,
the first direction extends across the first, second and third regions, and
distances, in the second direction, between adjacent ones of the first active patterns are different from those between adjacent ones of the second active patterns.

2. The method of claim 1 , wherein the forming of each of the first preliminary active patterns comprises forming a pair of first line patterns each extending longitudinally in the first direction, and forming a first connection pattern that connects adjacent ends of the first line patterns to each other in the third region, and
the forming of each of the second preliminary active patterns comprises forming a pair of second line patterns each extending longitudinally in the first direction, and a second connection pattern, forming a second connection pattern that connects adjacent ends of the second line patterns to each other in the third region.

3. The method of claim 2 , wherein the first etching process removes the first and second connection patterns.

4. The method of claim 2 , wherein a distance in the second direction between the pair of first line patterns is different from that between the pair of second line patterns.

5. The method of claim 4 , wherein the first and second preliminary active patterns are formed such that a distance in the second direction between adjacent ones of the first preliminary active patterns is substantially equal to the distance between the first line patterns, and
a distance in the second direction between adjacent ones of the second preliminary active patterns is substantially equal to the distance between the second line patterns.

6. The method of claim 1 , wherein the forming of the first and second preliminary active patterns comprises:
forming a hard mask on the substrate including in the first second regions;
forming first sacrificial patterns on the hard mask in the first region and forming second sacrificial patterns on the hard mask in the second region;
forming first and second spacers on sidewall surfaces of the first and second sacrificial patterns, respectively;
removing the first and second sacrificial patterns;
etching the hard mask exposed by the first and second spacers to form first and second hard mask patterns in the first and second regions, respectively; and
etching an upper portion of the substrate using the first and second hard mask patterns as an etch mask to form a first trench defining the first and second preliminary active patterns.

7. The method of claim 6 , wherein the forming of the first and second sacrificial patterns comprises:
forming a sacrificial layer on the hard mask;
forming first and second photoresist patterns on the sacrificial layer in the first and second regions, respectively; and
etching the sacrificial layer using the first and second photoresist patterns as an etch mask.

8. The method of claim 7 , wherein the forming of the first and second photoresist patterns comprises exposing a photoresist layer on the sacrificial layer to light of a given wavelength, and developing the exposed layer of photoresist,
the first photoresist patterns comprising a plurality of first linear photoresist patterns at a first pitch, and the second photoresist patterns comprising a plurality of second linear photoresist patterns at a second pitch and collectively spaced apart in the first direction by a first distance from the first linear photoresist patterns,
the second pitch being different from the first pitch, and
the first distance being smaller than said given wavelength of the light used to form the photoresist patterns.

9. The method of claim 6 , wherein the first etching process forms a second trench in the third region, the bottom of the second trench in the third region being disposed at a level lower than that of the bottom of the first trench, and a widest part of the second trench having sides at boundaries between the third and first regions and between the third and second regions, respectively.

10. A method of fabricating a semiconductor device, comprising:
patterning a substrate to form a first trench defining first preliminary active patterns which extend longitudinally in a first direction and are spaced apart from each other in a second direction crossing the first direction, and second preliminary active patterns which extend longitudinally in the first direction and are spaced apart from the first preliminary active patterns in the first direction and from each other in the second direction, a distance in the second direction between adjacent ones of the first preliminary active patterns being different than a distance in the second direction between adjacent ones of the second preliminary active patterns;
forming mask patterns on the substrate which expose end portions of the first and second preliminary active patterns, the end portions of the first preliminary active patterns collectively spaced in the first direction from the end portions of the second preliminary active patterns;
performing an etching process, in which the mask patterns are used as an etch mask, that removes the end portions of the first and second preliminary active patterns and forms first and second active patterns therefrom, respectively; and
forming a first gate structure crossing the first active patterns and a second gate structure crossing the second active patterns, on the substrate,
wherein the etching process forms a second trench having a bottom disposed at a level lower than a bottom of the first trench, and such that a width of the second trench in the first direction is equal to a distance between a collection of all of the first active patterns and a collection of all of the second active patterns in the first direction.

11. The method of claim 10 , wherein the forming of each of the first preliminary active patterns comprises forming a pair of first line patterns extending longitudinally in the first direction and a first connection pattern connecting adjacent end portions of the first line patterns, the forming of each of the second preliminary ac

Assignees

• Baek Sanghoon
• Park Jae-Ho
• Yang Seolun
• Song Taejoong
• Oh Sang-Kyu
• Samsung Electronics Co Ltd

Inventors

• Baek Sanghoon
• Park Jae-Ho
• Yang Seolun
• Song Taejoong
• Oh Sang-Kyu

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P50/695

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H10P50/691

  for Group V materials or Group III-V materials · CPC title

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/014

  using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title