Method for fabricating equal height metal pillars of different diameters

Patent metadata

Field	Value
Publication number	US-9324557-B2
Application number	US-201414259530-A
Country	US
Kind code	B2
Filing date	Apr 23, 2014
Priority date	Mar 14, 2014
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

A process to form metal pillars on a flip-chip device. The pillars, along with a layer of solder, will be used to bond die pads on the device to respective substrate pads on a substrate. A photoresist is deposited over the device and a first set of die pads on the device are exposed by forming openings of a first diameter in the photoresist. Pillars of the first diameter are formed by electroplating metal onto the exposed die pads. Then a second photoresist deposited over the first photoresist covers the pillars of the first diameter. Openings of a second diameter are formed in the first and second photoresists to expose a second set of die pads. Pillars of the second diameter are formed by electroplating metal onto the exposed die pads. The photoresists are then removed along with conductive layers on the device used as part of the plating process.

First claim

The invention claimed is:

1. A package comprising:
a flip-chip device having die pads thereon;
a substrate having substrate pads thereon that are aligned with respective die pads;
a first plurality of metal pillars having a first diameter disposed between a first plurality of the die pads and a first plurality of the substrate pads;
a second plurality of metal pillars having a second diameter disposed between a second plurality of the die pads and a second plurality of the substrate pads; and
a third plurality of metal pillars having a third diameter disposed between a third plurality of the die pads and a third plurality of the substrate pads;
wherein the second diameter is greater than the first diameter, the third diameter is greater than the second diameter, all of the of metal pillars have substantially the same height, and the metal pillars are formed by electroplating metal onto the die pads.

2. The package of claim 1 wherein the metal is copper.

3. The package of claim 1 wherein each die pad of the first plurality of die pads includes at least one of a first contact layer, a first barrier layer, and a first strike layer.

4. The package of claim 3 wherein each die pad of the second plurality of die pads includes at least one of a contact layer, a barrier layer, and a strike layer.

5. The package of claim 1 wherein each die pad of the first plurality of die pads includes a first contact layer, a first barrier layer, and a first strike layer, wherein the first contact layer is positioned between the flip-chip device and the first barrier layer, wherein the first barrier layer is positioned between the first contact layer and the first strike layer, wherein the first strike layer is positioned between the first barrier layer and one of the first plurality of metal pillars, and wherein each of the first contact layer, the first barrier layer, and the first strike layer have a diameter at least as large as the first diameter of the one of the first plurality of metal pillars.

6. The package of claim 5 wherein each die pad of the second plurality of die pads includes a second contact layer, a second barrier layer, and a second strike layer, wherein the second contact layer is positioned between the flip-chip device and the second barrier layer, wherein the second barrier layer is positioned between the second contact layer and the second strike layer, wherein the second strike layer is positioned between the second barrier layer and one of the second plurality of metal pillars, and wherein each of the second contact layer, the second barrier layer, and the second strike layer have a diameter at least as large as the second diameter of the one of the second plurality of metal pillars.

7. The package of claim 6 further comprising:
a plurality of first solder layers, each of the plurality of first solder layers positioned between one of the first plurality of metal pillars and a corresponding second substrate pad; and
a plurality of second solder layers, each of the plurality of second solder layers positioned between one of the one of the second plurality of metal pillars and a corresponding second substrate pad,
wherein a diameter of each of the plurality of second solder layers is greater than a diameter of each of the plurality of first solder layers,
wherein a combined height of each of the a plurality of second solder layers and the corresponding one of the second plurality of metal pillars is substantially the same as a combined height of each of the plurality of first solder layers and the corresponding one of the first plurality of metal pillars.

8. The package of claim 7 wherein all of the metal pillars are electrically coupled to corresponding die substrate pads.

9. The package of claim 8 wherein each first and second barrier layer comprises titanium, and each first and second strike layer comprises copper.

10. The package of claim 8 wherein each die pad of the third plurality of die pads includes a third contact layer, a third barrier layer, and a third strike layer, wherein the third contact layer is positioned between the flip-chip device and the third barrier layer, wherein the third barrier layer is positioned between the third contact layer and the third strike layer, wherein the second strike layer is positioned between the third barrier layer and one of the third plurality of metal pillars, and wherein each of the third contact layer, the third barrier layer, and the third strike layer have a diameter at least as large as the third diameter of the one of the third plurality of metal pillars.

11. The package of claim 10 further comprising:
a plurality of third solder layers, each of the plurality of third solder layers positioned between one of the third plurality of metal pillars and a corresponding third substrate pad,
wherein a diameter of each of the plurality of third solder layers is greater than the first diameter of each of the plurality of first solder layers and the plurality of second solder layers,
wherein a combined height of each of the a plurality of third solder layers and the corresponding one of the third plurality of metal pillars is substantially the same as a combined height of each of the plurality of first solder layers and the corresponding one of the first plurality of metal pillars.

12. The package of claim 8 , wherein each of the metal pillars of the first and second plurality of metal pillars has a height above a corresponding die pad and each of the plurality of first solder layers and the plurality of second solder layers has a height above the respective solder layer's metal pillar, and a ratio of the height of a metal pillar to the height of the respective metal pillar's solder layer is between 1:10 and 100:1, and the first diameter is at least 5% larger than the second diameter.

13. The package of claim 8 , wherein the height of each of the metal pillars is 20 to 70 microns, the height of each solder layer is 10 to 60 microns, a sum of the height of each metal pillar and a respective solder layer is 80 microns or less, and the first and the second diameters are between 20 and 80 microns.

14. The package of claim 8 , wherein a sum of the height of each of the metal pillars and a respective solder layer is between 5 microns and 130 microns and the first and second diameters are between 5 and 150 microns.

15. The package of claim 1 , wherein the first plurality of metal pillars are positioned more toward a periphery of the package relative to the second plurality of metal pillars.

16. The package of claim 1 , wherein at least one of the first plurality of metal pillars is a signal interconnection, and wherein at least one of the second plurality of metal pillars is a power interconnection or a ground interconnection.

17. The package of claim 1 , wherein the flip-chip device comprises a material selected from the group consisting of silicon, gallium arsenide, indium phosphide, and a combination thereof and wherein the substrate is selected from the group consisting of glass-epoxy, polytetrafluoroethylene, ceramic, silicon, glass, and a combination thereof.

18. A package comprising:
a flip-chip device having die pads thereon;
a substrate having substrate pads thereon that are aligned with respective die pads;
a first plurality of metal pillars having a first diameter disposed between a first plurality of the die pads and a first plurality of the substrate pads;
a second plurality of metal pillars having a second diameter disposed between a second plurality of the die pads and a second plurality of

Assignees

• Lsi Corp
• Avago Technologies General Ip

Inventors

• Cate Steven D
• Osenbach John W

Classifications

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/9415

  relative to the surface, e.g. recessed, protruding · CPC title

• H10W72/07254

  changes in dispositions · CPC title

• H10W72/01938

  in gaseous form, e.g. by CVD or PVD · CPC title