Flat panel display with integrated touch screen panel

US9323400B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9323400-B2
Application numberUS-201113021581-A
CountryUS
Kind codeB2
Filing dateFeb 4, 2011
Priority dateSep 14, 2010
Publication dateApr 26, 2016
Grant dateApr 26, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A flat panel display having an integrated touch screen panel directly formed on a sealing thin film is disclosed. In the display, sensing lines of the touch screen panel are formed to extend to a substrate of the display panel, on which organic light emitting elements are formed, so that the touch screen panel and the display panel are connected to a flexible printed circuit board, thereby simplifying manufacturing processes and decreasing product cost.

First claim

Opening claim text (preview).

What is claimed is: 1. A flat panel display with an integrated touch screen panel, comprising: a substrate having a pixel area in which a plurality of pixels are formed and the substrate having an area greater than the pixel area; a sealing thin film formed over the pixel area of the substrate so as to inhibit oxygen and moisture from infiltrating into the pixels and the sealing thin film having an area greater than the pixel area; a plurality of sensing cells, formed directly over a top surface of the sealing thin film to form a touch screen panel; a plurality of sensing lines arranged outside the pixel area; the sensing lines comprising a first portion and a second portion; and a flexible printed circuit board (FPCB) attached to one end of the substrate, wherein the sensing lines are formed directly over the top surface of the sealing thin film in the first portion and the sensing lines are formed directly over the substrate in the second portion and extend from an end of the sealing thin film directly to the substrate beyond an end of the sealing thin film and to the side of the pixel area so as to be electrically connected to the FPCB, wherein the sealing thin film is interposed between the pixel area and the plurality of sensing cells, wherein the end of the sealing thin film is formed to be inclined downwardly toward the FPCB and the sensing lines are formed to have a conforming incline to prevent the sensing lines passing over the end of the sealing thin film from being broken, and wherein each of the sensing lines extends from a sensing cell to the FPCB as a single connection. 2. The flat panel display according to claim 1 , wherein a driving IC for driving the pixels is mounted on the substrate outside of the pixel area. 3. The flat panel display according to claim 2 , wherein the driving IC is electrically connected to the FPCB. 4. The flat panel display according to claim 2 , wherein the driving IC comprises a control circuit for controlling the touch screen panel. 5. The flat panel display according to claim 1 , wherein the sealing thin film has a stacked structure of a plurality of organic and inorganic layers. 6. The flat panel display according to claim 5 , wherein the sealing thin film is formed with a structure in which a first organic layer, a first inorganic layer, a second organic layer and a second inorganic layer are sequentially stacked. 7. The flat panel display according to claim 6 , wherein the first and second organic layers are formed of a material selected from the group consisting of epoxy, acrylate and urethane acrylate. 8. The flat panel display according to claim 6 , wherein the first and second inorganic layers are formed of a material selected from the group consisting of Al x O y and SixO y . 9. The flat panel display according to claim 1 , wherein the sensing cells comprise a plurality of first sensing cells formed to be connected along each line in a first direction, and a plurality of second sensing cells alternately arranged not to be overlapped with the first sensing cells and formed to be connected along each line in a second direction substantially perpendicular to the first direction. 10. The flat panel display according to claim 9 , wherein the first sensing cells are connected along each line in the first direction by first connection patterns, and the second sensing cells are connected along each line in the second direction by second connection patterns. 11. The flat panel display according to claim 10 , wherein the first connection patterns are respectively patterned to have independent patterns in an upper or lower layer of the first sensing cells so that they are electrically connected to the first sensing cells at an upper or lower portion of the first sensing cells. 12. The flat panel display according to claim 1 , wherein the sealing thin film comprises an inclined surface at the end thereof, wherein the sensing lines are formed over the inclined surface. 13. The flat panel display according to claim 1 , wherein the sensing lines are formed over surfaces of the sealing thin film and the substrate, the surfaces facing the same direction.

Assignees

Inventors

Classifications

  • G06F3/044Primary

    by capacitive means · CPC title

  • Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

  • Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • Conductors connecting electrodes to cell terminals · CPC title

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Frequently asked questions

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What does patent US9323400B2 cover?
A flat panel display having an integrated touch screen panel directly formed on a sealing thin film is disclosed. In the display, sensing lines of the touch screen panel are formed to extend to a substrate of the display panel, on which organic light emitting elements are formed, so that the touch screen panel and the display panel are connected to a flexible printed circuit board, thereby simp…
Who is the assignee on this patent?
Kim Jong-Soo, Kim Do-Youb, Song Myoung-Seop, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F3/044. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).