Apparatus and method for coding/decoding block low density parity check code in a mobile communication system

Patent metadata

Field	Value
Publication number	US-9319068-B2
Application number	US-201414256288-A
Country	US
Kind code	B2
Filing date	Apr 18, 2014
Priority date	Aug 26, 2003
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A system and method for processing a block Low Density Parity Check (LDPC) code are provided. The system includes, a decoding apparatus for decoding a block LDPC code using a parity check matrix, the parity check matrix including an information part and a parity part, the parity part including a first section (B) including a plurality of first permutation matrices, a second section (D) including a second permutation matrix, a third section (T) including a plurality of identity matrices (I) arranged diagonally within the third section and a plurality of third permutation matrices arranged below the plurality of identity matrices, and a fourth section (E) including a fourth permutation matrix.

First claim

What is claimed is:

1. A system for processing a block low density parity check (LDPC) code, the system comprising:
a decoding apparatus configured to decode a block LDPC code based on a parity check matrix, the parity check matrix including an information part and a parity part, the parity part comprising:
a first section (B) including a first permutation matrix and an identity matrix,
a second section (D) including a second permutation matrix, and
a third section (T) including identity matrices arranged diagonally within the third section and identity matrices arranged below the identity matrices which are arranged diagonally within the third section.

2. The system of claim 1 , wherein the parity part comprises a fourth section (E) including an identity matrix.

3. The system of claim 2 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a matrix according to ET −1 B+(D) conforms to an identity matrix.

4. The system of claim 2 , wherein the first permutation matrix is arranged in the first block of the first section (B), and the identity matrix is arranged in the last block of the fourth section (E).

5. The system of claim 1 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

6. The system of claim 2 , wherein a length of the block LDPC code is n, and a length of each block included in the first section (B), the second section (D), the third section (T), and the fourth section (E) is Z less than n.

7. The system of claim 2 , wherein the block LDPC code supports various coding rates based on a length of the block LDPC code and a length of each block included in the first section (B), the second section (D), the third section (T), and the fourth section (E).

8. A method for decoding a block low density parity check (LDPC) code by a decoding apparatus, the method comprising:
decoding a block LDPC code based on a parity check matrix, the parity check matrix including an information part and a parity part, the parity part comprising:
a first section (B) including a first permutation matrix and an identity matrix,
a second section (D) including a second permutation matrix, and
a third section (T) including identity matrices arranged diagonally within the third section and identity matrices arranged below the identity matrices which are arranged diagonally within the third section.

9. The method of claim 8 , wherein the parity part comprises a fourth section (E) including an identity matrix.

10. The method of claim 9 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a matrix according to ET −1 B+(D) conforms to an identity matrix.

11. The method of claim 9 , wherein the first permutation matrix is arranged in the first block of the first section (B), and the identity matrix is arranged in the last block of the fourth section (E).

12. The method of claim 8 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

13. The method of claim 9 , wherein a length of the block LDPC code is n, and a length of each block included in the first section (B), the second section (D), the third section (T), and the fourth section (E) is Z less than n.

14. The method of claim 9 , wherein the block LDPC code supports various coding rates based on a length of the block LDPC code and a length of each block included in the first section (B), the second section (D), the third section (T), and the fourth section (E).

15. A system for processing a block low density parity check (LDPC) code, the system comprising:
an encoding apparatus configured to encode a block LDPC code based on a parity check matrix, the parity check matrix including an information part and a parity part, the parity part comprising:
a first section (B) including a first permutation matrix and an identity matrix,
a second section (D) including a second permutation matrix, and
a third section (T) including identity matrices arranged diagonally within the third section and identity matrices arranged below the identity matrices which are arranged diagonally within the third section.

16. The system of claim 15 , wherein the parity part comprises a fourth section (E) including an identity matrix.

17. The system of claim 16 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a matrix according to ET −1 B+(D) conforms to an identity matrix.

18. The system of claim 16 , wherein the first permutation matrix is arranged in the first block of the first section (B), and the identity matrix is arranged in the last block of the fourth section (E).

19. The system of claim 15 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

20. The system of claim 16 , wherein a length of the block LDPC code is n, and a length of each block included in the first section (B), the second section (D), the third section (T), and the fourth section (E) is Z less than n.

21. The system of claim 16 , wherein the block LDPC code supports various coding rates based on a length of the block LDPC code and a length of each block included in the first section (B), the second section (D), the third section (T), and the fourth section (E).

22. A method for encoding a block low density parity check (LDPC) code by an encoding apparatus, the method comprising:
encoding a block LDPC code based on a parity check matrix, the parity check matrix including an information part and a parity part, the parity part comprising:
a first section (B) including a first permutation matrix and an identity matrix,
a second section (D) including a second permutation matrix, and
a third section (T) including identity matrices arranged diagonally within the third section and identity matrices arranged below the identity matrices which are arranged diagonally within the third section.

23. The method of claim 22 , wherein the parity part comprises a fourth section (E) including an identity matrix.

24. The method of claim 23 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a matrix according to ET −1 B+(D) conforms to an identity matrix.

25. The method of claim 23 , wherein the first permutation matrix is arranged in the first block of the first section (B), and the identity matrix is arranged in the last block of the fourth section (E).

26. The method of claim 22 , wherein the permutation matrices corresponding to each of the first section (B) and the second section (D) are configured such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

27. The method of claim 23 , wherein a length of the block LDPC code is n, and a length of each block included

Assignees

• Samsung Electronics Co Ltd
• Samsung Electronics Co Ltd

Inventors

• Kyung Gyu-Bum
• Jeong Hong-Sil
• Kim Jae-Yoel
• Park Sung-Eun
• Yang Kyeong-Cheol
• Myung Se-Ho

Classifications

• H03M13/1188

  wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three · CPC title

• H03M13/118

  Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure (H03M13/1165 takes precedence) · CPC title

• H03M13/1171

  Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes · CPC title

• H03M13/1194

  Repeat-accumulate [RA] codes · CPC title

• H03M13/1102

  Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes · CPC title