Method of manufacturing semiconductor light emitting device

Patent metadata

Field	Value
Publication number	US-9318647-B2
Application number	US-201414490438-A
Country	US
Kind code	B2
Filing date	Sep 18, 2014
Priority date	Jan 21, 2014
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A method of manufacturing a semiconductor light emitting device includes forming a light emitting structure layer including an active layer on a first substrate. A second substrate is bonded to the light emitting structure layer at a first temperature higher than room temperature. The first substrate is removed from the light emitting structure layer at a second temperature higher than room temperature. The second substrate and the light emitting structure are cooled to reach room temperature. A coefficient of thermal expansion of the second substrate is different from a coefficient of thermal expansion of the active layer.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor light emitting device, the method comprising:
forming a light emitting structure layer including an active layer on a first substrate;
bonding the second substrate to the light emitting structure layer at a first temperature higher than room temperature;
removing the first substrate from the light emitting structure layer at a second temperature higher than room temperature; and
cooling the second substrate and the light emitting structure to reach room temperature,
wherein the active layer has a compressive stress induced thereto after the forming of the light emitting structure layer, and the second substrate has a coefficient of thermal expansion lower than a coefficient of thermal expansion of the active layer to induce tensile stress in the active layer during the cooling of the second substrate.

2. The method of claim 1 , wherein the second substrate is any one material selected from the group consisting of Si, SiC, AlN, GaP, InP, and graphite.

3. The method of claim 1 , wherein the first substrate is a sapphire substrate, and the light emitting structure layer including the active layer includes a Group III-V nitride semiconductive material.

4. The method of claim 1 , wherein the second temperature is lower than or equal to the first temperature.

5. The method of claim 1 , wherein a difference in coefficients of thermal expansion between the active layer and the second substrate is within a range of 0.5×10-6/K to 3.0×10-6/K.

6. The method of claim 1 , wherein the bonding of the second substrate to the light emitting structure layer is performed by eutectic bonding of a bonding metal.

7. The method of claim 5 , wherein the bonding metal is a gold alloy having a eutectic temperature of 200° C. or higher.

8. The method of claim 1 , wherein the removing of the first substrate is performed by laser lift-off (LLO).

9. The method of claim 1 , wherein a thickness of the second substrate is greater than a thickness of the light emitting structure layer.

10. The method of claim 1 , wherein the light emitting structure layer further includes a reflective metal layer disposed on a surface thereof in contact with the second substrate.

11. The method of claim 1 , further comprising forming an electrode on a surface of the light emitting structure layer from which the first substrate has been removed.

12. The method of claim 1 , further comprising
forming a conductive via penetrating through the second semiconductor layer and the active layer before bonding the second substrate; and
forming an electrode on an upper surface of the second semiconductor layer after cooling the second substrate and the light emitting structure.

13. A method of manufacturing a semiconductor light emitting device package, the method comprising:
manufacturing a semiconductor light emitting device according to the method of claim 1 ;
mounting the semiconductor light emitting device on one of a pair of lead frames, and
electrically connecting the semiconductor light emitting device to the other of the lead frames through a wire and to the one of the lead frames through the second substrate of the semiconductor light emitting device.

14. A method of manufacturing a semiconductor light emitting device package, the method comprising:
manufacturing a semiconductor light emitting device according to the method of claim 1 ;
mounting the semiconductor light emitting device on a first portion of a mounting board; and
electrically connecting the semiconductor light emitting device to a second portion of the mounting board separated from the first portion through a wire, and to the first portion of the mounting board through the second substrate of the semiconductor light emitting device.

15. A method of manufacturing a semiconductor light emitting device, the method comprising:
forming a light emitting structure layer including an active layer on a first substrate;
bonding the second substrate to the light emitting structure layer at a first temperature higher than room temperature;
removing the first substrate from the light emitting structure layer at a second temperature higher than room temperature; and
cooling the second substrate and the light emitting structure to reach room temperature,
wherein the active layer has a tensile stress induced thereto after the forming of the light emitting structure layer, and the second substrate has a coefficient of thermal expansion greater than a coefficient of thermal expansion of the active layer to induce compressive stress in the active layer during the cooling of the second substrate.

16. A method of manufacturing a semiconductor light emitting device, the method comprising:
forming, on a first substrate, a light emitting structure layer to include an active layer;
determining whether compressive or tensile stress is induced in the active layer;
selectively forming, based on a result of the determination, a second substrate to have a material having a coefficient of thermal expansion lower than a coefficient of thermal expansion of the active layer or to have a material having a coefficient of thermal expansion greater than the coefficient of thermal expansion of the active layer;
bonding the second substrate to the light emitting structure layer at a first temperature higher than room temperature,
removing the first substrate from the light emitting structure layer at a second temperature higher than room temperature;
cooling the second substrate and the light emitting structure to reach room temperature,
wherein the second substrate is formed to have a material having a coefficient of thermal expansion lower than the coefficient of thermal expansion of the active layer, when it is determined that compressive stress is induced in the active layer.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Bum Joon
• Choi Seung Woo
• Kim Sung Tae
• Park Young Min
• Sim Eun Deok
• Lee Sung Pyo

Classifications

• H10W10/181

  Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title

• H10P95/11

  Separation of active layers from substrates · CPC title

• H10P90/1914

  using bonding · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title