Display device and electronic device
US-2015372065-A1 · Dec 24, 2015 · US
US9318540B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9318540-B2 |
| Application number | US-201314371510-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 5, 2013 |
| Priority date | May 29, 2013 |
| Publication date | Apr 19, 2016 |
| Grant date | Apr 19, 2016 |
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A LED pixel unit circuit and a display panel. The circuit comprises a driving module ( 31 ) which is provided with a driving control unit ( 311 ). The driving control unit ( 311 ) comprises a matching TFT (T 4 ) whose threshold voltage is matched with the threshold voltage of the driving TFT (DTFT), is located between the first switching element (T 1 ) and the first capacitor (C 1 ), and is configured to control charging and discharging of the first capacitor (C 1 ) so as to write the threshold voltage of the matching TFT (T 4 ) and a new data voltage into the first capacitor (C 1 ) while eliminating the original data voltage in the first capacitor (C 1 ) and thereby compensate for the threshold voltage of the driving TFT (DTFT). The circuit can solve the problem of brightness non-uniformity of the display panel due to different threshold voltages of the TFTs, and also integrate a touch screen circuit into the pixel unit circuit to realize a touch function of the LED display panel.
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What is claimed is: 1. A LED pixel unit circuit comprising a driving module and a LED, the driving module comprising a driving TFT, a first switching element, a second switching element, a first capacitor and a driving control unit, wherein a gate of the driving TFT is connected to a first node, a source of the driving TFT is connected to a positive voltage output terminal of a power source, and a drain of the driving TFT is connected to an anode of the LED; a cathode of the LED is connected to a negative voltage output terminal of the power source; the first capacitor is located between the first node and a second node as a first connection terminal of the driving control unit; the first switching element is connected between a third node as a second connection terminal of the driving control unit and a data line in series; the second switching element is connected between the positive voltage output terminal of the power source and the first node; and the driving control unit comprises a matching TFT whose threshold voltage is matched with the threshold voltage of the driving TFT, is located between the first switching element and the first capacitor, and is configured to control charging and discharging of the first capacitor so as to write the threshold voltage of the matching TFT and a new data voltage into the first capacitor while eliminating the original data voltage in the first capacitor, and thereby compensate for the threshold voltage of the driving TFT. 2. The circuit of claim 1 , wherein the driving control unit also comprises a third switching element and a fifth switching element, the third switching element is connected between the third node and the second node in series; the matching TFT functions as a fourth switching element, and is connected with the third switching element in parallel oppositely between the third node and the second node; and the fifth switching element is connected between the second node and a reference voltage output terminal in series. 3. The circuit of claim 2 , wherein the circuit also comprises a sensing module comprising a sixth switching element, a seventh switching element, a second capacitor, an amplifying TFT and a sensing element; the sixth switching element is connected between the first node and a gate of the amplifying TFT in series; the seventh switching element is connected between a drain of the amplifying TFT and a sensing line in series; the second capacitor is connected between the gate of the amplifying TFT and a control terminal of the seventh switching element in series; the sensing element is connected to the gate of the amplifying TFT; and the sensing module is configured to control charging and discharging of the second capacitor in the sensing module so as to make a touch signal by a finger be amplified by the amplifying TFT in the sensing module. 4. The circuit of claim 3 , wherein the first switching element to the seventh switching element are a first TFT to a seventh TFT respectively. 5. The circuit of claim 4 , wherein a gate of the first TFT is connected with a scan signal for a current row of pixels, a source of the first TFT is connected to the data line, and a drain of the first TFT is connected to the third node; a gate of the second TFT is connected with the scan signal for the current row of pixels, a source of the second TFT is connected to the positive voltage output terminal of the power source, and a drain of the second TFT is connected to the first node; a gate and a drain of the third TFT are connected to the second node together, and a source of the third TFT is connected to the third node; a gate and a drain of the fourth TFT are connected to the third node together, and a source of the fourth TFT is connected to the second node; and a gate of the fifth TFT is connected with a control signal for the current row of pixels, a source of the fifth TFT is connected to the second node, and a drain of the fifth TFT is connected to the reference voltage output terminal. 6. The circuit of claim 5 , wherein a gate of the sixth TFT is connected with the scan signal for the current row of pixels, a source of the sixth TFT is connected to the first node, and a drain of the sixth TFT is connected to the gate of the amplifying TFT; a gate of the seventh TFT is connected with a scan signal for a next row of pixels, a source of the seventh TFT is connected to the drain of the amplifying TFT, and a drain of the seventh TFT is connected to the sensing line; and the gate of the amplifying TFT is connected to the drain of the sixth TFT, the source of the amplifying TFT is connected with the positive voltage of the power source, and the drain of the amplifying TFT is connected to the source of the seventh TFT. 7. The circuit of claim 4 , wherein all of the TFTs are P type TFTs. 8. The circuit of claim 3 , wherein the sensing element is a sensing electrode, and is configured to form induced capacitance between the sensing electrode and a body of a person when the person touches the sensing electrode. 9. The circuit of claim 4 , wherein the fourth TFT is the same as the driving TFT in terms of size and shape. 10. A display panel, characterized by comprising a LED pixel unit circuit according to claim 1 . 11. The display panel of claim 10 , wherein the driving control unit also comprises a third switching element and a fifth switching element, the third switching element is connected between the third node and the second node in series; the matching TFT functions as a fourth switching element, and is connected with the third switching element in parallel oppositely between the third node and the second node; and the fifth switching element is connected between the second node and a reference voltage output terminal in series. 12. The display panel of claim 11 , wherein the circuit also comprises a sensing module comprising a sixth switching element, a seventh switching element, a second capacitor, an amplifying TFT and a sensing element; the sixth switching element is connected between the first node and a gate of the amplifying TFT in series; the seventh switching element is connected between a drain of the amplifying TFT and a sensing line in series; the second capacitor is connected between the gate of the amplifying TFT and a control terminal of the seventh switching element in series; the sensing element is connected to the gate of the amplifying TFT; and the sensing module is configured to control charging and discharging of the second capacitor in the sensing module so as to make a touch signal by a finger be amplified by the amplifying TFT in the sensing module. 13. The display panel of claim 12 , wherein the first switching element to the seventh switching element are a first TFT to a seventh TFT respectively. 14. The display panel of claim 13 , wherein a gate of the first TFT is connected with a scan signal for a current row of pixels, a source of the first TFT is connected to the data line, and a drain of the first TFT is connected to the third node; a gate of the second TFT is connected with the scan signal for the current row of pixels, a source of the second TFT is connected to the positive voltage output terminal of the power source, and a drain of the second TFT is connected to the first node; a gate and a drain of the third TFT are connected to the second node together, and a source of the third TFT is connected to the third node; a gate and a drain of the fourth TFT are connected to the third node together, and a source of the fourth TFT is connected to the second node; and a gate of the fifth TFT is connected w
with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title
forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title
Electricity · mapped topic
by capacitive means · CPC title
Improving the luminance or brightness uniformity across the screen · CPC title
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