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US-2024414942-A1 · Dec 12, 2024 · US
US9318513B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9318513-B2 |
| Application number | US-201214113289-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 20, 2012 |
| Priority date | Apr 28, 2011 |
| Publication date | Apr 19, 2016 |
| Grant date | Apr 19, 2016 |
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Provided is a semiconductor device equipped with: a plurality of switching elements (T 1 , T 2 ) that are connected in series; a first capacitance (Cs 1 ) having one electrode connected to an end of the plurality of switching elements (T 1 , T 2 ) and another electrode being connected to a first capacitance wiring line (CSL 1 ); a second capacitance (Cs 2 ) with one electrode connected to a node that connects two adjacent switching elements (T 1 , T 2 ) among the plurality of switching elements, and another electrode being connected to a second capacitance wiring line (CSL 2 ); and a light-shielding film that block light from being incident on at least one of the plurality of switching elements (T 1 , T 2 ).
Opening claim text (preview).
The invention claimed is: 1. A method of driving a semiconductor device that includes: a plurality of switching elements that are connected in series; a first capacitance having one electrode connected to an end of the plurality of switching elements and another electrode being connected to a first capacitance wiring line; a second capacitance having one electrode connected to a node that connects two adjacent switching elements among the plurality of switching elements, and another electrode being connected to a second capacitance wiring line; and a light-shielding film that blocks light from being incident on at least one of the plurality of switching elements, the method comprising: turning OFF each switching element between the first capacitance and the second capacitance; and when each switching element between the first capacitance and the second capacitance is OFF, changing a voltage of the second capacitance wiring line such that a difference in potential between said one electrode of the first capacitance and said one electrode of the second capacitance is reduced. 2. The method according to claim 1 , wherein the step of changing the voltage of the second capacitance wiring line includes, when each switching element between the first capacitance and second capacitance is OFF, changing the voltage of the second capacitance wiring line such that a voltage on said one electrode of the second capacitance becomes higher than a voltage on said one electrode of the first capacitance. 3. The method according to claim 1 , wherein the voltage on said one electrode of the second capacitance is lower than the voltage on said one electrode of the first capacitance immediately before the step of changing the voltage of the second capacitance wiring line. 4. The method according to claim 1 , wherein in the step of changing the voltage of the second capacitance wiring line, when each switching element between the first capacitance and the second capacitance is OFF, a voltage of the second capacitance wiring line is changed two or more times at set intervals during which said each switching element is OFF. 5. The method according to claim 1 , wherein in the step of changing the voltage of the second capacitance wiring line, when each switching element between the first capacitance and the second capacitance is OFF, the voltage of the second capacitance wiring line is changed in the same amount two or more times.
having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title
having light shields · CPC title
integrated with passive devices, e.g. auxiliary capacitors · CPC title
wherein the TFTs are in active matrices · CPC title
Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title
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