Display panel having a boosting voltage applied to a subpixel electrode, and method of driving the same

Patent metadata

Field	Value
Publication number	US-9318066-B2
Application number	US-201213586356-A
Country	US
Kind code	B2
Filing date	Aug 15, 2012
Priority date	Jan 18, 2012
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A display panel comprises a plurality of pixels. A first pixel among the plurality of pixels comprises a first subpixel which further comprises a first subpixel electrode, a first switching element configured to apply a data voltage to the first subpixel electrode, and a second switching element applying a boosting voltage to the first subpixel electrode. The first pixel further comprises a second subpixel comprising a second subpixel electrode and a third switching element applying the data voltage to the low pixel electrode. Accordingly, the display quality and the reliability of the display panel may be improved.

First claim

What is claimed is:

1. A display panel comprising:
a plurality of pixels, a first pixel among the plurality of pixels comprising a first subpixel and a second subpixel;
the first subpixel comprising a first subpixel electrode, a first switching element configured to apply a data voltage to the first subpixel electrode and a second switching element configured to apply a boosting voltage to the first subpixel electrode; and
the second subpixel comprising a second subpixel electrode and a third switching element configured to apply the data voltage to the second subpixel electrode,
wherein:
the first switching element comprises a source electrode connected to a first data line configured to provide the data voltage, a gate electrode connected to a first gate line, and a drain electrode connected to the first subpixel electrode;
the second switching element comprises a source electrode connected to a first boosting line configured to provide the boosting voltage, a gate electrode connected to the first gate line, and a drain electrode directly connected to the first subpixel electrode; and
the first boosting line extends in a direction parallel to the first gate line.

2. The display panel of claim 1 , wherein a polarity of the boosting voltage is the same as a polarity of the data voltage with respect to a common voltage.

3. The display panel of claim 2 , wherein the boosting voltage has a uniform level in a frame.

4. The display panel of claim 3 , wherein a level of the boosting voltage corresponds to a grayscale equal to or greater than a medium grayscale.

5. The display panel of claim 4 , wherein the level of the boosting voltage corresponds to a maximum grayscale.

6. The display panel of claim 2 , wherein the data voltage and the boosting voltage are inverted in each frame.

7. The display panel of claim 1 , wherein a size of the first subpixel is equal to or smaller than a size of the second subpixel.

8. The display panel of claim 1 , wherein the first switching element and the second switching element are connected to the same gate line.

9. The display panel of claim 1 , wherein a width to length ratio of a channel of the first switching element is greater than a width to length ratio of a channel of the second switching element.

10. The display panel of claim 1 , wherein the third switching element comprises a source electrode connected to the first data line, a gate electrode connected to the first gate line and a drain electrode connected to the second subpixel electrode.

11. The display panel of claim 1 , wherein the first boosting line is disposed directly on the same layer as the first gate line.

12. The display panel of claim 1 , further comprising a boosting connecting line, wherein the first boosting line is connected to another first boosting line of at least one of other pixels through the boosting connecting line.

13. The display panel of claim 12 , wherein the boosting connecting line extends in a direction parallel to the first data line, and
the boosting connecting line overlaps the first data line.

14. The display panel of claim 12 , wherein the boosting connecting line is disposed directly on the same layer as the first subpixel electrode and the second subpixel electrode.

15. The display panel of claim 1 , wherein a second pixel among the plurality of pixels comprises:
a first subpixel comprising a first subpixel electrode, a first switching element configured to apply a data voltage to the first subpixel electrode and a second switching element configured to apply a boosting voltage to the first subpixel electrode; and
a second subpixel comprising a second subpixel electrode and a third switching element applying the data voltage to the second subpixel electrode,
wherein the second pixel is adjacent to the first pixel in a first direction,
a polarity of the data voltage of the second pixel is opposite to a polarity of the data voltage of the first pixel with respect to a common voltage, and
a polarity of the boosting voltage of the second pixel is opposite to a polarity of the boosting voltage of the first pixel with respect to the common voltage.

16. The display panel of claim 15 , wherein the boosting voltage of the second pixel has an absolute value same as an absolute value of the boosting voltage of the first pixel.

17. The display panel of claim 15 , wherein an absolute value of the boosting voltage of the second pixel is different from an absolute value of the boosting voltage of the first pixel.

18. The display panel of claim 15 , further comprising a second boosting line,
wherein:
the boosting voltage of the first pixel is applied to the first pixel through the first boosting line;
the boosting voltage of the second pixel is applied to the second pixel through the second boosting line; and
the first boosting line extends in a direction parallel to the second boosting line.

19. The display panel of claim 15 , wherein a third pixel among the plurality of pixels comprises:
a first subpixel comprising a first subpixel electrode, a first switching element configured to apply a data voltage to the first subpixel electrode and a second switching element configured to apply a boosting voltage to the first subpixel electrode; and
a second subpixel comprising a second subpixel electrode and a third switching element configured to apply the data voltage to the second subpixel electrode,
wherein the third pixel is adjacent to the first pixel in a second direction crossing the first direction,
a polarity of the data voltage of the third pixel is opposite to a polarity of the data voltage of the first pixel with respect to the common voltage, and
a polarity of the boosting voltage of the third pixel is opposite to a polarity of the boosting voltage of the first pixel with respect to the common voltage.

20. The display panel of claim 15 , wherein a third pixel among the plurality of pixels comprises:
a first subpixel comprising a first subpixel electrode, a first switching element configured to apply a data voltage to the first subpixel electrode and a second switching element configured to apply a boosting voltage to the first subpixel electrode; and
a second subpixel comprising a second subpixel electrode and a third switching element configured to apply the data voltage to the second subpixel electrode,
wherein the third pixel is adjacent to the first pixel in a second direction crossing the first direction,
a polarity of the data voltage of the third pixel is the same as a polarity of the data voltage of the first pixel with respect to the common voltage, and
a polarity of the boosting voltage of the third pixel is the same as a polarity of the boosting voltage of the first pixel with respect to the common voltage.

21. A method of driving a display panel, the method comprising:
applying a data voltage to a first pixel electrode through a first switching element;
applying a boosting voltage to the first pixel electrode through a second switching element; and
applying the data voltage to a second pixel electrode through a third switching element,
wherein:
the first switching element comprises a source electrode connected to a first data line configured to provide the data voltage, a gate electrode connected to a first gate line, and a drain electrode connected to the first pixel electrode;
the second switching element comprises a source electrode connected to a first boosting line configured to provide the boosting voltage, a gate electr

Assignees

• Jeong Youn-Hak
• Lee Gak-Seok
• Samsung Display Co Ltd

Inventors

• Jeong Youn-Hak
• Lee Gak-Seok

Classifications

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• G09G3/3659 Primary

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• A01D34/52

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• G09G2300/0447

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