Storage system which realizes asynchronous remote copy using cache memory composed of flash memory, and control method thereof

US9317423B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9317423-B2
Application numberUS-201313816834-A
CountryUS
Kind codeB2
Filing dateJan 7, 2013
Priority dateJan 7, 2013
Publication dateApr 19, 2016
Grant dateApr 19, 2016

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The first storage apparatus provides a primary logical volume, and the second storage apparatus has a secondary logical volume. When the first storage apparatus receives a write command to the primary logical volume, a package processor in a flash package allocates first physical area in the flash memory chip to first cache logical area for write data and stores the write data to the allocated first physical area. And when the package processor receives journal data creation command form the processor, allocates the first physical area to second journal area for journal data without storing journal data corresponding to the write data.

First claim

Opening claim text (preview).

The invention claimed is: 1. A storage system comprising: a first storage apparatus including a first processor, at least one first memory device providing a storage area for a primary logical volume, and a first flash package which has a plurality of first flash memory chips and a first package processor and temporarily stores write data to be written to the primary logical volume; and a second storage apparatus including a second processor, and at least one second memory device providing a storage area for a secondary logical volume, and receiving journal data corresponding to the write data of the primary logical volume and update information, and reflecting the journal data to the secondary logical volume according to the update information; wherein when the first storage apparatus receives a first write command which requests to write a first write data to the primary logical volume, the first package processor in the first flash package receives the first write data transferred by control of the first processor, allocates a first physical area in the first flash memory chips to a first cache logical area managed by the first flash package, and writes the first write data to the allocated first physical area, and wherein, when the first package processor in the first flash package receives a first journal data creation request corresponding to the first write data from the first processor, the first package processor allocates the first physical area which stores the first write data to a second cache logical area for first journal data corresponding to the first write data managed by the first flash package, wherein the first processor creates first update information, which includes a first sequential number indicating a write order of the first write data, and sends the first update information to the first flash package, wherein the first package processor allocates a second physical area in the first flash memory chips to a third cache logical area for update information managed by the first flash package, and stores the first update information to the allocated second physical area, wherein when the first storage apparatus receives a second write command which requests to update the first write data after the first package processor receives the first journal data creation request, the first package processor in the first flash package receives the update to the first write data transferred by control of the first processor, releases the allocation of the first physical area to the first cache logical area, allocates a third physical area in the first flash memory chips to the first cache logical area managed by the first flash package, and writes the update to the first write data to the allocated third physical area, and wherein the first, second and third cache logical areas are each different cache logical areas managed by the first flash package, and the first, second and third physical areas are each different physical areas in the first flash memory chips. 2. The storage system according to claim 1 , wherein the first processor sends the first journal data creation request, which includes information of the first cache logical area and information of the second cache logical area, to the first flash package, and wherein the first package processor allocates the first physical area, which is allocated to the first cache logical area, to the second cache logical area by referring to the information of the first cache logical area and the information of the second cache logical area included in the first journal data creation request. 3. The storage system according to claim 2 , wherein the first package processor sends a completion report for the first journal data creation request after allocating the first physical area to the second cache logical area for the first journal data, and wherein the first processor sends a write completion notification to the write command after detecting completion of storing the first write data to the first flash package and receiving the completion report from the first flash package. 4. The storage system according to claim 1 , wherein, when the first storage apparatus receives a read journal command from the second storage apparatus, the first processor reads the first update information and the first journal data from the first flash package according to the first sequential number included in the read journal command, and sends the first update information and the first journal data to the second storage apparatus by referring to the second and third cache logical areas. 5. The storage system according to claim 4 , wherein the second storage apparatus further includes a second flash package which has a plurality of second flash memory chips and a second package processor and temporarily stores data to be written to the secondary logical volume, wherein the second package processor in the second flash package allocates a first physical area, to store the first journal data, in the second flash memory chips to a second cache logical area for the first journal data managed by the second flash package, and wherein, when the second package processor in the second flash package reflects the first journal data to the secondary logical volume, the second package processor allocates the first physical area of the second flash memory chips to a first cache logical area for the first write data managed by the second flash package. 6. The storage system according to claim 5 , wherein, in the second storage apparatus, the second processor destages the first journal data stored in the first physical area, which is allocated to the first cache logical area for the first write data, to the secondary logical volume. 7. The storage system according to claim 6 , wherein the first storage apparatus manages a primary journal logical volume provided by the at least one first memory device, wherein the first package processor releases the allocation of the first physical area to the first cache logical area, after the first processor destages the first write data from the first cache logical area to the primary logical volume or after the first package processor writes the update to the first write data to the first cache logical area, wherein the first package processor releases the allocation of the first physical area to the second cache logical area, after the first processor destages the first journal data from the second cache logical area to the primary journal logical volume, and wherein the first package processor manages the first physical area, from which allocation to the first cache logical area and the second cache logical area is released, as a physical area to be reclaimed. 8. The storage system according to claim 6 , wherein the first package processor releases the allocation of the first physical area to the first cache logical area, after the first processor destages the first write data from the first cache logical area to the primary logical volume or after the first package processor writes the update to the first write data to the first cache logical area, wherein the first package processor releases the allocation of the first physical area to the second cache logical area, after receiving the first sequential number of the first journal data which is reflected on the secondary logical volume from the second storage apparatus, and wherein the first package processor manages the first physical area, from which allocation to the first cache logical area and the second cache logical area is released, as a physical area to be reclaimed. 9. A control method for a storage apparatus including a processor, a plurality of memory devices, and a cache package having

Assignees

Inventors

Classifications

  • G06F3/061Primary

    Improving I/O performance · CPC title

  • Replication mechanisms · CPC title

  • Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

  • Asynchronous techniques · CPC title

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What does patent US9317423B2 cover?
The first storage apparatus provides a primary logical volume, and the second storage apparatus has a secondary logical volume. When the first storage apparatus receives a write command to the primary logical volume, a package processor in a flash package allocates first physical area in the flash memory chip to first cache logical area for write data and stores the write data to the allocated …
Who is the assignee on this patent?
Hitachi Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/061. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).