Semiconductor apparatus with calibration circuit and system including the same

Patent metadata

Field	Value
Publication number	US-9317052-B1
Application number	US-201414552141-A
Country	US
Kind code	B1
Filing date	Nov 24, 2014
Priority date	Nov 24, 2014
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A calibration circuit of a semiconductor apparatus may include: a reference voltage generator suitable for generating first and second pull-up reference voltages based on a pull-up control signal, and generating first and second pull-down reference voltages based on a pull-down control signal; and a calibrator suitable for generating a pull-up resistor code corresponding to an external reference resistor based on the first and second pull-up reference voltages, and generating a pull-down resistor code corresponding to the external reference resistor based on the first and second pull-down reference voltages and the pull-up resistor code.

First claim

What is claimed is:

1. A semiconductor apparatus, comprising:
a reference voltage generator suitable for generating first and second pull-up reference voltages based on a pull-up control signal, and generating first and second pull-down reference voltages based on a pull-down control signal; and
a calibrator suitable for generating a pull-up resistor code corresponding to an external reference resistor based on the first and second pull-up reference voltages, and generating a pull-down resistor code corresponding to the external reference resistor based on the first and second pull-down reference voltages and the pull-up resistor code.

2. The semiconductor apparatus according to claim 1 , wherein the reference voltage generator comprises:
a pull-up decoding unit suitable for decoding the pull-up control signal to generate a pull-up decoding signal;
a pull-up reference voltage trimming unit suitable for outputting the first and second pull-up reference voltages based on the pull-up decoding signal;
a pull-down decoding unit suitable for decoding the pull-down control signal to generate a pull-down decoding signal; and
a pull-down reference voltage trimming unit suitable for outputting the first and second pull-down reference voltages based on the pull-down decoding signal.

3. The semiconductor apparatus according to claim 1 , wherein the pull-down control signal has a different value from the pull-up control signal.

4. The semiconductor apparatus according to claim 1 , wherein the calibrator comprises:
a pull-up resistor setting unit suitable for setting a pull-up resistor value corresponding to the external reference resistor; and
a pull-down resistor setting unit suitable for setting a pull-down resistor value corresponding to the external reference resistor.

5. The semiconductor apparatus according to claim 4 , wherein the pull-up resistor setting unit comprises:
a pull-up resistor leg section suitable for setting the pull-up resistor according to the pull-up resistor code; and
a pull-up resistor code generator suitable for comparing the first and second pull-up resistor voltages to a pull-up comparison voltage, which is generated according to a ratio of the pull-up resistor value and a value of the external reference resistor, to selectively change the pull-up resistor code.

6. The semiconductor apparatus according to claim 5 , wherein the pull-up resistor code generator does not change a value of the pull-up resistor code when the pull-up comparison voltage is between the first and second pull-up reference voltages.

7. The semiconductor apparatus according to claim 5 , wherein the pull-up resistor code generator changes a value of the pull-up resistor code, when the pull-up comparison voltage is higher than the first pull-up reference voltage or lower than the second pull-up reference voltage, which is lower than the second pull-up reference voltage.

8. The semiconductor apparatus according to claim 5 , wherein the pull-up resistor setting unit comprises:
a pull-down resistor leg section suitable for setting the pull-down resistor value according to the pull-down resistor code;
a replica pull-up resistor leg suitable for setting a replica pull-up resistor value having substantially the same resistor value as the pull-up resistor value according to the pull-up resistor code; and
a pull-down resistor code generator suitable for comparing the first and second pull-down reference voltages to a pull-down comparison voltage, which is generated according to a ratio of the pull-down resistor value and the replica pull-up resistor value, to selectively change the pull-down resistor code.

9. The semiconductor apparatus according to claim 8 , wherein the pull-down resistor code generator does not change a value of the pull-down resistor code when the pull-down comparison voltage is between the first and second pull-down reference voltages.

10. The semiconductor apparatus according to claim 8 , wherein the pull-down resistor code generator changes the value of the pull-down resistor code when the pull-down comparison voltage is higher than the first pull-down reference voltage or lower than the second pull-down reference voltage, which is lower than the second pull-down reference voltage.

11. The semiconductor apparatus according to claim 1 , wherein when the pull-up resistor value and the pull-down resistor value are set to be different from each other, the pull-up control signal and the pull-down control signal can be separately adjusted.

12. A system comprising:
a master device; and
a slave device suitable for communicating with the master device through a signal bus,
wherein the slave device comprises a calibration circuit for setting a resistor value corresponding to an external reference resistor, and
the calibration circuit comprises:
a reference voltage generator suitable for generating first and second pull-up reference voltages based on a pull-up control signal, and generating first and second pull-down reference voltages based on a pull-down control signal; and
a calibrator suitable for generating a pull-up resistor code corresponding to the external reference resistor based on the first and second pull-up reference voltages, and generating a pull-down resistor code corresponding to the external reference resistor based on the first and second pull-up reference voltages and the pull-up resistor code.

13. The system according to claim 12 , wherein the reference voltage generator comprises:
a pull-up decoding unit suitable for decoding the pull-up control signal to generate a pull-up decoding signal;
a pull-up reference voltage trimming unit suitable for outputting the first and second pull-up reference voltages based on the pull-up decoding signal;
a pull-down decoding unit suitable for decoding the pull-down control signal to generate a pull-down decoding signal; and
a pull-down reference voltage trimming unit suitable for outputting the first and second pull-down reference voltages based on the pull-down decoding signal.

14. The system according to claim 12 , wherein the pull-down control signal has a different value from the pull-up control signal.

15. The system according to claim 12 , wherein when a pull-up resistor value set according to the pull-up resistor code has a different value from a pull-down resistor value set according to the pull-down resistor code, the pull-up control signal and the pull-down control signal can be separately adjusted.

16. The system according to claim 12 , wherein the calibrator comprises:
a pull-up resistor setting unit suitable for setting a pull-up resistor value corresponding to the external reference resistor; and
a pull-down resistor setting unit suitable for setting a pull-down resistor value corresponding to the external reference resistor.

17. The system according to claim 16 , wherein the pull-up resistor setting unit comprises:
a pull-up resistor leg section suitable for setting the pull-up resistor according to the pull-up resistor code; and
a pull-up resistor code generator suitable for comparing the first and second pull-up resistor voltages to a pull-up comparison voltage, which is generated according to a ratio of the pull-up resistor value and a value of the external reference resistor, to selectively change the pull-up resistor code.

18. The system according to claim 17 , wherein the pull-up resistor code generator does not change a value of the pull-up resistor code when the pull-up comparison voltage is between the first and second pull-up reference voltages.

Assignees

• Sk Hynix Inc

Inventors

• Hwang Tae Jin

Classifications

• G05F1/468 Primary

  characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title