Pixel circuit with capacitor discharge indicative of number of events

US9313434B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9313434-B2
Application numberUS-201314066853-A
CountryUS
Kind codeB2
Filing dateOct 30, 2013
Priority dateNov 2, 2012
Publication dateApr 12, 2016
Grant dateApr 12, 2016

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A pixel circuit includes a single photon avalanche diode (SPAD) and a measurement circuit including a capacitance. The circuit is operable to discharge a known portion of the charge on the capacitance upon each detection of a SPAD event within a time period, such that the charge remaining on the capacitance at the end of the time period corresponds to the number of SPAD events detected within the time period. A time resolved imaging apparatus includes an array of such pixel circuits. A method of counting photon detection includes sensing photons with a SPAD device and discharging a known portion of the charge on a capacitance upon each detection of a SPAD event within a time period.

First claim

Opening claim text (preview).

What is claimed is: 1. A pixel circuit, comprising: a single photon avalanche diode (SPAD) configured to detect SPAD events; a measurement circuit comprising a capacitance, wherein said measurement circuit is operable to discharge a portion of the charge on said capacitance upon each SPAD event detection within a time period, such that the charge remaining on said capacitance at the end of the time period corresponds to the number of SPAD events detected within the time period; and a time gating stage operable to begin sensing operation on reception of an enable signal and comprising: a switch operable to selectively connect the SPAD output to the measurement circuit on reception of said enable signal; and two further switches operable to disable the pixel circuit on reception of a disable signal. 2. The pixel circuit as claimed in claim 1 , wherein the charge remaining on said capacitance is an analog representation of the number of SPAD events detected within the time period. 3. The pixel circuit as claimed in claim 1 , further comprising a switch controlled by the SPAD output such that it causes said discharge of a known portion of the charge on said capacitance on each detection of a SPAD event. 4. The pixel circuit as claimed in claim 1 , further comprising a plurality of measurement circuits, each having a capacitance, wherein each measurement circuit defines a statistical bin. 5. The pixel circuit as claimed in claim 4 , operable such that: said time period is divided between the statistical bins, such that periodically repeating portions of said time period are exclusively assigned to one of said statistical bins; and wherein each of said measurement circuits is operable to discharge a known portion of the charge on its respective capacitance upon each detection of a SPAD event only during the portion of said time period exclusively assigned to that measurement circuit. 6. The pixel circuit as claimed in claim 4 , wherein the photon originates with a modulated radiation source, the circuit operable to: define a first statistical bin to coincide with the portion of said time period during which said modulated radiation source is on define a second statistical bin to coincide with the portion of said time period during which said modulated radiation source is off; count the number of SPAD events received in each of said first and second statistical bins, calculate a phase change in radiation incident on said SPAD compared to radiation having been emitted by said modulated radiation source, from the ratio of the number of SPAD events received in one of said first and second statistical bins to the number of SPAD events received in the other of said first and second statistical bins, and calculate from said phase change, the time of flight of radiation emitted by said radiation source and incident on said SPAD. 7. A time resolved imaging apparatus, comprising: an array of pixel circuits, each pixel circuit comprising: a single photon avalanche diode (SPAD) configured to detect SPAD events; a measurement circuit comprising a capacitance, wherein said measurement circuit is operable to discharge a portion of the charge on said capacitance upon each SPAD event detection within a time period, such that the charge remaining on said capacitance at the end of the time period corresponds to the number of SPAD events detected within the time period, and a radiation source for providing radiation incident on said SPAD; wherein the time resolved imaging apparatus is operable to modulate said radiation source and to switch between counting using a first statistical bin and counting using a second statistical bin, said switching being in phase with the modulation of said radiation source. 8. The time resolved imaging apparatus as claimed in claim 7 , being operable to begin sensing operation of said array of pixels simultaneously with activation of said radiation source. 9. The time resolved imaging apparatus as claimed in claim 7 , being operable to perform three-dimensional imaging. 10. A method of measuring the time of flight of a photon, comprising: activating a radiation source to emit photons; detecting photons using a single photon avalanche diode (SPAD); discharging a known portion of the charge on a capacitance upon each detection of a photon within a time period, such that the charge remaining on said capacitance at the end of the time period corresponds to the number of photons detected within the time period; and dividing said time period between a plurality of statistical bins, such that periodically repeating portions of said time period are exclusively assigned to one of said statistical bins. 11. The method as claimed in claim 10 , wherein the charge remaining on said capacitance is an analog representation of the number of SPAD events detected within the time period. 12. The method as claimed in claim 10 , wherein said radiation source is modulated, and comprising: defining a first statistical bin to coincide with the portion of said time period during which said modulated radiation source is on; defining a second statistical bin to coincide with the portion of said time period during which said modulated radiation source is off; counting the number of SPAD events received in each of said first and second statistical bins, calculating a phase change in the radiation received by said SPAD compared to radiation emitted by said radiation source, from the ratio of the number of SPAD events received in one of said first and second statistical bins to the number of SPAD events received in the other of said first and second statistical bins, and calculating from said phase change, the time of flight of radiation received by said SPAD. 13. A pixel circuit, comprising: a single photon avalanche diode (SPAD) configured to detect SPAD events; a measurement circuit comprising a capacitance, wherein said measurement circuit is operable to discharge a portion of the charge on said capacitance upon each SPAD event detection within a time period, such that the charge remaining on said capacitance at the end of the time period corresponds to the number of SPAD events detected within the time period; a plurality of measurement circuits, each having a capacitance, wherein each measurement circuit defines a statistical bin; and wherein the pixel circuit is operable such that: said time period is divided between the statistical bins, such that periodically repeating portions of said time period are exclusively assigned to one of said statistical bins; and wherein each of said measurement circuits is operable to discharge a known portion of the charge on its respective capacitance upon each detection of a SPAD event only during the portion of said time period exclusively assigned to that measurement circuit. 14. The pixel circuit as claimed in claim 13 , further comprising a time gating stage operable to begin sensing operation on reception of an enable signal. 15. The pixel circuit as claimed in claim 14 , wherein said time gating stage comprises a switch operable to selectively connect the SPAD output to the measurement circuit on reception of said enable signal. 16. The pixel circuit as claimed in claim 15 , wherein said time gating stage comprises two further switches operable to disable the pixel circuit on reception of a disable signal. 17. The pixel circuit as claimed in claim 13 , wherein the charge remaining on said capacitance is an analog representation of the number of SPAD events detected within the time period.

Assignees

Inventors

Classifications

  • H04N25/77Primary

    Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

  • G01S7/4863Primary

    Detector arrays, e.g. charge-transfer gates · CPC title

  • Three-dimensional [3D] imaging with simultaneous measurement of time-of-flight at a two-dimensional [2D] array of receiver pixels, e.g. time-of-flight cameras or flash lidar · CPC title

  • for mapping or imaging · CPC title

  • H04N5/3745Primary

    Electricity · mapped topic

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What does patent US9313434B2 cover?
A pixel circuit includes a single photon avalanche diode (SPAD) and a measurement circuit including a capacitance. The circuit is operable to discharge a known portion of the charge on the capacitance upon each detection of a SPAD event within a time period, such that the charge remaining on the capacitance at the end of the time period corresponds to the number of SPAD events detected within t…
Who is the assignee on this patent?
St Microelectronics Res & Dev, Univ Edinburgh
What technology area does this patent fall under?
Primary CPC classification H04N25/77. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).