Inverter with series connected gate driving circuits and voltage divider

Patent metadata

Field	Value
Publication number	US-9312787-B2
Application number	US-201313770882-A
Country	US
Kind code	B2
Filing date	Feb 19, 2013
Priority date	Sep 27, 2012
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

An inverter includes an inverter unit including at least one inverter arm having at least one high side switch and at least one low side switch connected to each other in series between a ground and an input power terminal providing input power having a preset voltage level, and switching the input power to output AC power; and a high voltage gate driving circuit unit including at least one high voltage gate driving unit having a plurality of high voltage gate drivers connected in series between an input terminal of an instruction signal requesting a switching control of the inverter unit and an output terminal of a control signal controlling switching of the inverter unit, such that switching of the high side switch is controlled, and voltage generated at the time of switching the high side switch is divided and applied to the plurality of high voltage gate drivers.

First claim

What is claimed is:

1. A gate driving circuit comprising:
a high voltage gate driving circuit unit including at least one high voltage gate driving unit having a plurality of high voltage gate drivers connected to each other in series between an input terminal receiving an instruction signal serving as a switching control for controlling an inverter unit and an output terminal outputting a control signal for controlling switching of the inverter unit,
the inverter unit including at least one inverter arm having at least two switches and switching input power to output alternating current (AC) power, and
the high voltage gate driving circuit unit controlling switching of a high side switch of the at least two switches, dividing voltage generated at an output of the high side switch at the time of the switching of the high side switch, and applying the divided voltage to the plurality of high voltage gate drivers.

2. The gate driving circuit of claim 1 , wherein the high voltage gate driving circuit unit includes a voltage-dividing unit dividing the voltage generated at the time of the switching of the high side switch and applied to the plurality of high voltage gate drivers, respectively.

3. The gate driving circuit of claim 2 , wherein the voltage-dividing unit includes a plurality of balancers connected to the plurality of high voltage gate drivers in parallel, respectively, and equally dividing the voltage applied to the plurality of high voltage gate drivers, respectively.

4. The gate driving circuit of claim 3 , wherein at least one balancer among the plurality of balancers includes at least one resistor connected to a corresponding high voltage gate driver in parallel.

5. The gate driving circuit of claim 4 , wherein the at least one balancer among the plurality of balancers further includes at least one diode connected to the at least one resistor in parallel.

6. The gate driving circuit of claim 1 , wherein the inverter unit is supplied with a single driving power.

7. The gate driving circuit of claim 6 , wherein the at least one high voltage gate driving unit further includes a power supplying unit having a plurality of power suppliers transferring the single driving power to the plurality of high voltage gate drivers, respectively.

8. The gate driving circuit of claim 7 , wherein the plurality of power suppliers include at least one or more diodes connected to each other in series.

9. The gate driving circuit of claim 8 , wherein the plurality of power suppliers include at least one or more diodes connected to each other in parallel.

10. The gate driving circuit of claim 1 , further comprising a low voltage gate driving unit controlling switching of a low side switch of the at least two switches.

11. The gate driving circuit of claim 1 , wherein the inverter unit includes three inverter arms connected to each other in parallel.

12. The gate driving circuit of claim 11 , further comprising first to third high voltage gate driving circuit units driving respective high side switches of the three inverter arms.

13. An inverter, comprising:
an inverter unit including at least one inverter arm having at least one high side switch and at least one low side switch connected to each other in series between a ground and an input power terminal providing input power having a preset voltage level, and switching the input power to output AC power; and
a high voltage gate driving circuit unit including at least one high voltage gate driving unit having a plurality of high voltage gate drivers connected in series between an input terminal receiving an instruction signal serving as a switching control for controlling the inverter unit and an output terminal outputting a control signal for controlling switching of the inverter unit, such that switching of the at least one high side switch is controlled, and voltage generated at an output of the at least one high side switch at the time of the switching of the at least one high side switch is divided and applied to the plurality of high voltage gate drivers.

14. The inverter of claim 13 , wherein the high voltage gate driving circuit unit includes a voltage-dividing unit dividing the voltage generated at the time of the switching of the at least one high side switch and applied to the plurality of high voltage gate drivers, respectively.

15. The inverter of claim 14 , wherein the voltage-dividing unit includes a plurality of balancers connected to the plurality of high voltage gate drivers in parallel, respectively, and equally dividing the voltage applied to the plurality of high voltage gate drivers, respectively.

16. The inverter of claim 15 , wherein at least one balancer among the plurality of balancers includes at least one resistor connected to a corresponding high voltage gate driver in parallel.

17. The inverter of claim 16 , wherein the at least one balancer among the plurality of balancers further includes at least one diode connected to the at least one resistor in parallel.

18. The inverter of claim 13 , wherein the inverter unit is supplied with a single driving power.

19. The inverter of claim 18 , wherein the at least one high voltage gate driving unit further includes a power supplying unit having a plurality of power suppliers transferring the single driving power to the plurality of high voltage gate drivers, respectively.

20. The inverter of claim 19 , wherein the plurality of power suppliers include at least one or more diodes connected to each other in series.

21. The inverter of claim 19 , wherein the plurality of power suppliers include at least one or more diodes connected to each other in parallel.

22. The inverter of claim 13 , further comprising a low voltage gate driving unit controlling switching of the at least one low side switch.

23. The inverter of claim 13 , wherein the inverter unit includes three inverter arms connected to each other in parallel.

24. The inverter of claim 23 , further comprising first to third high voltage gate driving circuit units driving respective high side switches of the three inverter arms.

Assignees

• Samsung Electro Mech

Inventors

• Jeong In Wha
• Suh Bum Seok

Classifications

• Y10T307/685

  Cross-Sectional Technologies · mapped topic

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M7/538 Primary

  in a push-pull configuration (H02M7/5375 takes precedence {; with oscillating arrangements H02M7/53832, H02M7/53846}) · CPC title

• H03K17/102

  in field-effect transistor switches · CPC title

• H02M7/537 Primary

  using semiconductor devices only, e.g. single switched pulse inverters · CPC title