Electronic devices having semiconductor memory units having magnetic tunnel junction element

Patent metadata

Field	Value
Publication number	US-9312474-B2
Application number	US-201314142896-A
Country	US
Kind code	B2
Filing date	Dec 29, 2013
Priority date	Apr 9, 2013
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

Disclosed are electronic devices comprising a semiconductor memory unit capable of reducing the switching current of a variable resistance element for switching between different resistance states. One implementation of a disclosed electronic device may include a first magnetic layer having an easy magnetization axis in a first direction and having a variable magnetization direction, a third magnetic layer having a magnetization direction pinned in the first direction, a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and having a magnetization direction pinned in a second direction different from the first direction, a tunnel barrier layer interposed between the first magnetic layer and the second magnetic layer, and a non-magnetic layer interposed between the second magnetic layer and the third magnetic layer.

First claim

What is claimed is:

1. An electronic device comprising a semiconductor memory unit that includes:
a first magnetic layer having an easy magnetization axis in a first direction and having a variable magnetization direction;
a third magnetic layer having a magnetization direction pinned in the first direction;
a second magnetic layer interposed between the first magnetic layer and the third magnetic layer and having a magnetization direction pinned in a second direction different from the first direction;
a tunnel barrier layer interposed between the first magnetic layer and the second magnetic layer; and
a non-magnetic layer interposed between the second magnetic layer and the third magnetic layer,
wherein the second direction is vertically inclined from a surface of the second magnetic layer.

2. The electronic device according to claim 1 , wherein the second magnetic layer and the third magnetic layer are subject to magnetically exchange coupling.

3. The electronic device according to claim 2 , wherein the second magnetic layer and the third magnetic layer are ferromagnetically coupled when the magnetization direction of the second magnetic layer is inclined toward a direction to the magnetization direction of the third magnetic layer.

4. The electronic device according to claim 2 , wherein the second magnetic layer and the third magnetic layer are anti-ferromagnetically coupled when the magnetization direction of the second magnetic layer is inclined toward a direction opposite to the magnetization direction of the third magnetic layer.

5. The electronic device according to claim 1 , wherein the first magnetic layer is magnetized parallel or anti-parallel to the magnetization direction of the third magnetic layer.

6. The electronic device according to claim 1 , wherein the first direction is parallel to a surface of the first magnetic layer.

7. The electronic device according to claim 1 , wherein the second direction is inclined from the first direction at an angle of greater than 0 degree and less than 90 degrees.

8. The electronic device according to claim 7 , wherein the second direction is inclined from a direction vertical to a surface of the first magnetic layer to a direction parallel to the surface of the first magnetic layer.

9. The electronic device according to claim 1 , wherein the second direction is inclined from the first direction at an angle of greater than 90 degrees and less than 180.

10. The electronic device according to claim 1 , wherein the second direction is inclined from the first direction at an angle of greater than 180 degrees and less than 270 degrees.

11. The electronic device according to claim 1 , wherein the second direction is inclined from the first direction at an angle of greater than 270 degrees and less than 360 degrees.

12. The electronic device according to claim 1 , further comprising an anti-ferromagnetic layer that contacts with the third magnetic layer.

13. The electronic device according to claim 1 , wherein the first magnetic layer comprises a lower magnetic layer, an upper magnetic layer, and a non-magnetic layer interposed between the lower magnetic layer and the upper magnetic layer.

14. The electronic device according to claim 1 , further comprising:
a first conductive layer coupled with the first magnetic layer, and
a second conductive layer coupled with the third magnetic layer.

15. The electronic device according to claim 14 , wherein:
the first conductive layer is a seed layer, and
the second conductive layer is a capping layer.

16. The electronic device according to claim 1 , further comprising a microprocessor which includes:
a control unit configured to receive a signal including a command from an outside of the microprocessor, and performs extracting, decoding of the command, or controlling input or output of a signal of the microprocessor;
an operation unit configured to perform an operation based on a result that the control unit decodes the command; and
a memory unit configured to store data for performing the operation, data corresponding to a result of performing the operation, or an address of data for which the operation is performed,
wherein the semiconductor memory unit is a part of the memory unit in the microprocessor.

17. An electronic device comprising a semiconductor memory unit that includes:
a first magnetic layer having an easy magnetization axis in a first direction and having a variable magnetization direction;
a third magnetic layer having a magnetization direction pinned in the first direction;
a second magnetic layer interposed between the first magnetic layer and the third magnetic layer and having a magnetization direction pinned in a second direction different from the first direction;
a tunnel barrier layer interposed between the first magnetic layer and the second magnetic layer; and
a non-magnetic layer interposed between the second magnetic layer and the third magnetic layer,
wherein the second direction is inclined from the first direction at an angle of greater than 0 degree and less than 90 degrees and the second direction is inclined from a direction vertical to a surface of the first magnetic layer to a direction parallel to the surface of the first magnetic layer.

Assignees

• Sk Hynix Inc

Inventors

• Kim Guk-Cheon
• Park Ki-Seon

Classifications

• G11C11/161 Primary

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• H01L43/08 Primary

  Electricity · mapped topic

• H01L27/228

  Electricity · mapped topic

• H10N50/85

  Materials of the active region · CPC title

• H10B61/00

  Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices · CPC title