Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9312350-B2
Application number	US-201414248727-A
Country	US
Kind code	B2
Filing date	Apr 9, 2014
Priority date	May 24, 2013
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor on a substrate, a second semiconductor layer formed of a nitride semiconductor on the first semiconductor layer, a gate trench formed in the second semiconductor layer or in the second and first semiconductor layers, a gate electrode formed at the gate trench, and a source electrode and a drain electrode formed on the second semiconductor layer. The gate trench has terminal parts of a bottom of the gate trench formed shallower than a center part of the bottom. A part of a sidewall of the gate trench is formed of a surface including an a-plane. The center part of the bottom is a c-plane. The terminal parts of the bottom form a slope from the c-plane to the a-plane.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first semiconductor layer made of a nitride semiconductor and formed on a substrate;
a second semiconductor layer made of a nitride semiconductor and formed on the first semiconductor layer;
a gate trench formed in the second semiconductor layer or in the second semiconductor layer and the first semiconductor layer;
a gate electrode formed at the gate trench; and
a source electrode and a drain electrode formed on the second semiconductor layer,
wherein a depth of the gate trench to a bottom of the gate trench is shallower at terminal parts than at a center part of the bottom of the gate trench,
wherein a sidewall of the gate trench is formed by an a-plane,
wherein the center part of the bottom of the gate trench is formed by a c-plane, and
wherein the terminal parts of the bottom of the gate trench form a slope from the c-plane to the a-plane.

2. The semiconductor device as claimed in claim 1 , wherein the first semiconductor layer is made of a material including GaN, and the second semiconductor layer is made of a material including AlGaN.

3. The semiconductor device as claimed in claim 1 , further comprising:
an insulation layer formed at the gate trench,
wherein the gate electrode is formed on the insulation layer.

4. The semiconductor device as claimed in claim 1 , further comprising:
a third semiconductor layer of a first conductivity-type made of of a nitride semiconductor and formed on the second semiconductor layer.

5. A power source device including the semiconductor device as claimed in claim 1 .

6. An amplifier including the semiconductor device as claimed in claim 1 .

Assignees

• Fujitsu Ltd

Inventors

• Minoura Yuichi
• Okamoto Naoya

Classifications

• H10D64/519

  characterised by their top-view geometrical layouts · CPC title

• H10D64/257

  for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D64/518

  characterised by their lengths or sectional shapes · CPC title

• H10D64/513 Primary

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title