Solid-state imaging device with a signal storing portion including first and second semiconductor regions

Patent metadata

Field	Value
Publication number	US-9312298-B2
Application number	US-201414473204-A
Country	US
Kind code	B2
Filing date	Aug 29, 2014
Priority date	Feb 10, 2014
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

According to one embodiment, in a solid-state imaging device, a signal storage portion in each of a plurality of pixels includes a first semiconductor region and a second semiconductor region. The first semiconductor region is of a first conductive type. The first semiconductor region coveres a side wall of an element isolation portion on a side of the signal storage portion. The second semiconductor region is of a second conductive type. The second conductive type is an opposite conductive type to the first conductive type. The second semiconductor region is arranged vertically in a depth direction from a deeper position than a front surface in a semiconductor substrate and extending in a plate shape along the first semiconductor region.

First claim

What is claimed is:

1. A solid-state imaging device comprising:
a plurality of pixels arranged on a semiconductor substrate, the plurality of pixels each including a signal storage portion; and
a DTI (Deep Trench Isolation) type element isolation portion that electrically separates the plurality of pixels on the semiconductor substrate from each other, wherein
the signal storage portion in each of the plurality of pixels includes
a first semiconductor region of a first conductive type, the first semiconductor region covering a side wall of the element isolation portion on a side of the signal storage portion, and
a second semiconductor region of a second conductive type, the second conductive type being an opposite conductive type to the first conductive type, the second semiconductor region being arranged vertically in a depth direction from a deeper position than a front surface in the semiconductor substrate and extending in a plate shape along the first semiconductor region, the second semiconductor region having a substantially L-shape when seen through from a direction perpendicular to the front surface of the semiconductor substrate.

2. The solid-state imaging device according to claim 1 , wherein
the first semiconductor region extends along a square tube including
a first surface, and
second surface intersecting with the first surface on a first cross line, and

the second semiconductor region includes
a first section extending in a plate shape along the first surface up to a position corresponding to the first cross line, and
a second section extending in a plate shape along the second surface from the position corresponding to the first cross line.

3. The solid-state imaging device according to claim 2 , wherein
each of the plurality of pixels further includes a trench gate extending in the depth direction up to the vicinity of the second semiconductor region from a position corresponding to the first cross line on the front surface of the semiconductor substrate.

4. The solid-state imaging device according to claim 1 , wherein
the first semiconductor region includes
a first sectional region, and
a second sectional region in a deeper position than the first sectional region

with respect to the front surface of the semiconductor substrate, and
concentration of the first conductive type impurities in the first sectional region is lower than concentration of the first conductive type impurities in the second sectional region.

5. The solid-state imaging device according to claim 1 , wherein
the signal storage portion in each of the plurality of pixels further includes a fourth semiconductor region of the first conductive type, covering the second semiconductor region from an opposite side to the first semiconductor region, and
an interface between the second and fourth semiconductor regions is along an interface between the second and first semiconductor regions.

6. The solid-state imaging device according to claim 1 , wherein
the signal storage portion in each of the plurality of pixels further includes a fourth semiconductor region arranged in a depth position substantially equal to the second semiconductor region in the semiconductor substrate, the fourth semiconductor region defining a boundary of the second semiconductor region on an opposite side to the first semiconductor region.

7. The solid-state imaging device according to claim 1 , wherein
the element isolation portion is configured in a pattern where parts of a grid-like pattern are removed and the pattern is made discontinuous in planar view.

8. A solid-state imaging device comprising:
a plurality of pixels arranged on a semiconductor substrate, the plurality of pixels each including a signal storage portion; and
a DTI (Deep Trench Isolation) type element isolation portion that electrically separates the plurality of pixels on the semiconductor substrate from each other, wherein
the signal storage portion in each of the plurality of pixels includes
a first semiconductor region of a first conductive type, the first semiconductor region covering a side wall of the element isolation portion on a side of the signal storage portion, and
a second semiconductor region of a second conductive type, the second conductive type being an opposite conductive type to the first conductive type, the second semiconductor region being arranged vertically in a depth direction from a deeper position than a front surface in the semiconductor substrate and extending in a plate shape along the first semiconductor region, the second semiconductor region having a substantially U-shape when seen through from a direction perpendicular to the front surface of the semiconductor substrate.

9. The solid-state imaging device according to claim 8 , wherein
the first semiconductor region extends along a square tube including
a first surface,
a second surface intersecting with the first surface on a first cross line, and
a third surface intersecting with the second surface on a second cross line on an opposite side to the first cross line, and

the second semiconductor region includes
a first section extending in a plate shape along the first surface up to a position corresponding to the first cross line,
a second section extending in a plate shape along the second surface from the position corresponding to the first cross line up to a position corresponding to the second cross line, and
a third section extending along the third surface from the position corresponding to the second cross line.

10. The solid-state imaging device according to claim 9 , wherein
each of the plurality of pixels further includes a trench gate extending in the depth direction up to the vicinity of the second semiconductor region from a position corresponding to a space between the first cross line and the second cross line on the front surface of the semiconductor substrate.

11. The solid-state imaging device according to claim 8 , wherein
the first semiconductor region includes
a first sectional region, and
a second sectional region in a deeper position than the first sectional region with respect to the front surface of the semiconductor substrate, and

concentration of the first conductive type impurities in the first sectional region is lower than concentration of the first conductive type impurities in the second sectional region.

12. The solid-state imaging device according to claim 8 , wherein
the signal storage portion in each of the plurality of pixels further includes a fourth semiconductor region of the first conductive type, covering the second semiconductor region from an opposite side to the first semiconductor region, and
an interface between the second and fourth semiconductor regions is along an interface between the second and first semiconductor regions.

13. The solid-state imaging device according to claim 8 , wherein
the signal storage portion in each of the plurality of pixels further includes a fourth semiconductor region arranged in a depth position substantially equal to the second semiconductor region in the semiconductor substrate, the fourth semiconductor region defining a boundary of the second semiconductor region on an opposite side to the first semiconductor region.

14. The solid-state imaging device according to claim 8 , wherein
the element isolation portion is configured in a pattern where parts of a grid-like pattern are removed and the pattern is made discontinuous in planar view.

15. A solid-state imaging device comprising:
a plurality of pixels arranged on a semiconductor substrate, the plurality

Assignees

• Toshiba Kk

Inventors

• Yamashita Hirofumi

Classifications

• H10F39/80373

  characterised by the gate of the transistor · CPC title

• H10F39/8063

  Microlenses · CPC title

• H10F39/8037

  the integrated elements comprising a transistor · CPC title

• H10F39/8033

  Photosensitive area · CPC title

• H10F39/8027

  Geometry of the photosensitive area · CPC title