Liquid crystal display having high and low luminances alternatively represented

Patent metadata

Field	Value
Publication number	US-9311877-B2
Application number	US-81691710-A
Country	US
Kind code	B2
Filing date	Jun 16, 2010
Priority date	Nov 17, 2009
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

A liquid crystal display includes: a liquid crystal capacitor; a first switching element which transmits a data voltage to the liquid crystal capacitor; a second switching element connected to the liquid crystal capacitor; and a transformation capacitor connected to the second switching element. A difference between a first time when the first switching element is turned on and a second time when the second switching element starts is turned on is greater than 1 horizontal period and less than 1 frame period.

First claim

What is claimed is:

1. A liquid crystal display comprising:
a first gate line which extends along a first direction and transmits a first gate signal;
a second gate line which extends along the first direction and transmits a second gate signal;
a data line which extends along a second direction perpendicular to the first direction and transmits a data signal;
a storage electrode line which includes a portion extending along the first direction and transmits a predetermined voltage;
a first thin film transistor comprising:
a first control electrode connected to the first gate line;
a first source electrode connected to the data line; and
a first drain electrode including an end portion at one end opposite the first source electrode and a first portion at another end;

a second thin film transistor comprising:
a second source electrode which is disposed between the end portion and the first portion of the first drain electrode and is included in the first drain electrode;
a second control electrode connected to the second gate line;
a second drain electrode including a second portion overlapping the storage electrode line in a plan view; and
the second source electrode disposed opposite the second drain electrode; and

a pixel electrode which is physically and electrically connected to the first drain electrode and receives the data signal from the first drain electrode,
wherein the second gate line is disposed between the first gate line and the storage electrode line in the plan view.

2. The liquid crystal display of claim 1 , wherein the second portion of the second drain electrode does not overlap the pixel electrode in the plan view.

3. The liquid crystal display of claim 2 , wherein the first portion of the first drain electrode overlaps the storage electrode line in the plan view.

4. The liquid crystal display of claim 3 , further comprising:
an insulating layer disposed on the first drain electrode, the insulating layer comprising a contact hole exposing a portion of the first drain electrode,
wherein the first drain electrode is connected to the pixel electrode through the contact hole, and
the contact hole overlaps the storage electrode line.

5. The liquid crystal display of claim 4 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

6. The liquid crystal display of claim 3 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

7. The liquid crystal display of claim 2 , further comprising:
an insulating layer disposed on the first drain electrode, the insulating layer comprising a contact hole exposing a portion of the first drain electrode,
wherein the first drain electrode is connected to the pixel electrode through the contact hole, and
the contact hole overlaps the storage electrode line.

8. The liquid crystal display of claim 7 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

9. The liquid crystal display of claim 2 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

10. The liquid crystal display of claim 1 , wherein the first portion of the first drain electrode overlaps the storage electrode line in the plan view.

11. The liquid crystal display of claim 10 , further comprising
an insulating layer disposed on the first drain electrode, the insulating layer comprising a contact hole exposing a portion of the first drain electrode,
wherein the first drain electrode is connected to the pixel electrode through the contact hole, and
the contact hole overlaps the storage electrode line.

12. The liquid crystal display of claim 11 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

13. The liquid crystal display of claim 10 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

14. The liquid crystal display of claim 1 , further comprising
an insulating layer disposed on the first drain electrode, the insulating layer comprising a contact hole exposing a portion of the first drain electrode,
wherein the first drain electrode is connected to the pixel electrode through the contact hole, and
the contact hole overlaps the storage electrode line.

15. The liquid crystal display of claim 14 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

16. The liquid crystal display of claim 1 , wherein a difference between a first temporal point when the first thin film transistor is turned on and a second temporal point when the second thin film transistor is turned on is greater than one horizontal period and less than one frame period.

Assignees

• Song Jang-Kun
• Samsung Display Co Ltd

Inventors

• Song Jang-Kun

Classifications

• G09G2310/067

  Special waveforms for scanning, where no circuit details of the gate driver are given · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G3/3659 Primary

  the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes · CPC title

• G09G2320/0261

  in the context of movement of objects on the screen or movement of the observer relative to the screen · CPC title

• G02F1/133345

  Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title