Zero-cycle router for networks on-chip

Patent metadata

Field	Value
Publication number	US-9306844-B2
Application number	US-201213673505-A
Country	US
Kind code	B2
Filing date	Nov 9, 2012
Priority date	Nov 9, 2011
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

A router includes a plurality of virtual networks, a plurality of output links, at least one decoder and arbitration circuitry. Each virtual network has a plurality of virtual network inputs and a plurality of virtual network outputs. Each virtual network output is associated with an output link. The decoder decodes a header of a data unit received on a virtual network of one of the virtual network inputs. The decoder generates a first request and a second request. The first request is for the allocation of a virtual network output of the virtual network to the virtual network input. The second request is for the allocation of an output link associated with the virtual network output to the virtual network output. The arbitration circuitry performs arbitration of the first request and arbitration of the second request in parallel.

First claim

What is claimed is:

1. A router, comprising:
a plurality of virtual networks, each virtual network having a plurality of virtual network inputs and a plurality of virtual network outputs;
a plurality of output links, each virtual network output associated with one of the output links;
at least one decoder configured to decode a header of a data unit received on a first virtual network input of a first virtual network, the at least one decoder configured to generate:
a first r…

Assignees

• St Microelectronics Grenoble 2

Inventors

• Locatelli Riccardo
• Petri Esa
• Coppolla Antonio-Marcello
• Fanucci Luca
• Saponara Sergio
• Bacchillone Tony

Classifications

• H04L49/109

  Electricity · mapped topic

• H04L45/34

  Electricity · mapped topic

• H04L45/58 Primary

  Electricity · mapped topic

• H04L45/74 Primary

  Electricity · mapped topic

• H04L45/60

  Electricity · mapped topic