Method and wire-line transceiver for performing serial loop back test
US-11979263-B2 · May 7, 2024 · US
US9306776B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9306776-B2 |
| Application number | US-201314023207-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 10, 2013 |
| Priority date | Sep 10, 2013 |
| Publication date | Apr 5, 2016 |
| Grant date | Apr 5, 2016 |
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A method for filtering a data signal includes transmitting the data signal from a transmitter to a receiver across a conductor disposed in an interposer, which interconnects the receiver and the transmitter. The data signal is low-passed with a filter, which includes a passive resistive element disposed within the interposer and coupled in series electrically with a passive inductive element. In relation thereto, the interposer is disposed in a position within the interposer, or upon a surface thereof. The filter is coupled to the conductor in a shunt configuration with respect to ground.
Opening claim text (preview).
What is claimed is: 1. A circuit comprising: an interposer component comprising a plurality of conductors disposed within a semiconductor substrate; a receiver component electrically coupled to a first end of at least one of the plurality of conductors; a transmitter component electrically coupled to a second end of the at least one of the plurality of conductors and configured to exchange a data signal with the receiver component; and a filter component configured to filter the data signal, wherein the filter component comprises a passive inductive device that is coupled electrically in series with a passive resistive device, wherein the passive resistive device is disposed within the interposer component, wherein the filter component is electrically coupled to the at least one of the plurality of conductors in a shunt configuration with respect to a ground potential. 2. The circuit as recited in claim 1 wherein the filter component is coupled to the at least one conductor at a location thereof more proximately to the first end. 3. The circuit as recited in claim 1 wherein the exchanging the data signal comprises a single ended transaction. 4. The circuit as recited in claim 1 wherein the plurality of conductors comprises a second conductor, wherein the receiver component is further coupled to a first end of the second conductor, and wherein the transmitter component is further coupled to a second end of the second conductor. 5. The circuit as recited in claim 4 wherein the exchanging the data signal comprises a differential exchange using each of the first conductor and the second conductor. 6. The circuit as recited in claim 4 wherein the filter component comprises a pair of filter components, and wherein a second filter component of the pair is coupled to the second conductor, with a shunt configuration in relation to ground. 7. The circuit as recited in claim 6 wherein the second filter component is coupled to the second conductor at a contact point proximate to the first end of the second conductor. 8. The circuit as recited in claim 1 wherein the interposer component comprises a plurality of metal layers disposed within the semiconductor substrate, and wherein the passive resistive device of the filter component is fabricated in one or more metal layers of the plurality of metal layers. 9. The circuit as recited in claim 1 wherein the passive inductive device of the filter component is disposed within the interposer component. 10. The circuit as recited in claim 9 wherein the passive inductive device comprises a spiral inductor. 11. The circuit as recited in claim 1 wherein the passive inductive device of the filter component is disposed upon a surface of the interposer component. 12. The circuit as recited in claim 11 wherein the passive inductive device comprises a wire bond inductor. 13. The circuit as recited in claim 11 wherein the passive inductive device comprises an inductor external to the interposer component and disposed upon a surface of the interposer component. 14. A method comprising: transmitting a data signal from a transmitter to a receiver across a conductor disposed in an interposer, wherein the conductor interconnects the receiver and the transmitter; and low-passing the data signal with a filter comprising a passive resistive element disposed within the interposer and coupled in series electrically with a passive inductive element, wherein the filter is coupled to the conductor in a shunt configuration with respect to a ground potential. 15. The method as recited in claim 14 wherein the data signal comprises a single ended transaction between the transmitter and the receiver. 16. The method as recited in claim 14 : wherein the conductor comprises a first conductor, wherein the interposer comprises a second conductor disposed within the interposer, wherein the second conductor interconnects the receiver and the transmitter, wherein the data signal comprises a two ended differential between a first signal component and a second signal component, and wherein the transmitting comprises sending the first signal component across the first conductor, the transmitting further comprising sending the second signal component across the second conductor. 17. The method of claim 14 , which the passive inductive component is disposed within the interposer component. 18. An electronic device comprising: a printed circuit board (PCB); receiver circuitry and transmitter circuitry that are coupled to the PCB, wherein the receiver circuitry and the transmitter circuitry are communicably coupled to each other via a conductor; an interposer mounted on the PCB; a passive equalizer coupled to the conductor, wherein the passive equalizer is configured in a shun configuration relative to a ground potential for low passing a signal transmitted between the receiver circuitry and the transmitter circuitry, wherein the passive equalizer comprises a passive resistor and a passive inductor, and wherein further the passive equalizer is electrically coupled to the conductor without using a conductive lead or a connector on the PCB. 19. The electronic device of claim 18 wherein the passive resistor and the passive inductor are each disposed within the interposer. 20. The electronic device of claim 18 wherein the passive inductor is disposed on a surface of the interposer and coupled to the conductor via a through-silicon via (TSV) routed at least partially within the interposer.
Arrangements at the transmitter end · CPC title
Arrangements specific to the receiver end · CPC title
Arrangements specific to the transmitter end · CPC title
Line equalisers; line build-out devices · CPC title
Circuits · CPC title
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