Synchronization signal processing method and apparatus

Patent metadata

Field	Value
Publication number	US-9306581-B2
Application number	US-201314133972-A
Country	US
Kind code	B2
Filing date	Dec 19, 2013
Priority date	Feb 13, 2012
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

The present invention provides a synchronization signal processing method and apparatus, which solves problems of low accuracy and a slow speed of synchronization operation executed on the synchronization signal. The specific steps include: acquiring multiple to-be-processed signals of a power supply, where the to-be-processed signals are signals changing periodically; generating a synchronization signal that has the same period as the to-be-processed signals by generating pulses in each period of the to-be-processed signals, where each period of the synchronization signal includes at least two pulses; detecting whether the synchronization signal is normal by determining whether parameters of all the pulses in the synchronization signal are accurate; and if the synchronization signal is normal, synchronizing the to-be-processed signals by performing time alignment on the pulses in the synchronization signal. The synchronization signal processing method and apparatus can be applied in a synchronization operation between signals.

First claim

What is claimed is:

1. A synchronization signal processing method, comprising:
acquiring multiple to-be-processed signals of a power supply, wherein the to-be-processed signals are signals changing periodically;
generating a synchronization signal that has a same period as the to-be-processed signals by generating pulses in each period of the to-be-processed signals, wherein at least two pulses are comprised in each period of the synchronization signal;
detecting whether the synchronization signal is normal by determining whether parameters of all the pulses in the synchronization signal are accurate; and
performing time alignment on the pulses in the synchronization signal to synchronize the to-be-processed signals when the synchronization signal is normal,
wherein generating the synchronization signal that has the same period as the to-be-processed signals by generating the pulses in each period of the to-be-processed signals further comprises:
generating, in a phase-locked manner, a voltage phase signal that has the same period as the to-be-processed signals, and when a to-be-processed signal is a three-phase signal, generating the voltage phase signal in the phase-locked manner, or calculating the voltage phase signal according to the to-be-processed signals;
acquiring phase points with a same number and a same phase angle value in each period of the voltage phase signal, wherein at least two of the phase points are acquired in each period; and
generating pulses at each of the phase points through a pulse generation apparatus, wherein all the obtained pulses are used as the synchronization signal that has the same period as the to-be-processed signals, and wherein widths of the pulses generated at the phase points that have the same phase angle value among all the periods of the voltage phase signal are the same.

2. The synchronization signal processing method according to claim 1 , wherein among all the periods of the voltage phase signal, widths of the pulses generated at the phase points that have different phase angle values are different.

3. A synchronization signal processing apparatus, comprising:
a first acquisition unit configured to acquire multiple to-be-processed signals of a power supply, wherein the to-be-processed signals are signals changing periodically;
a first generation unit configured to generate a synchronization signal that has a same period as the to-be-processed signals by generating pulses in each period of the to-be-processed signals and acquired by the first acquisition unit, wherein at least two pulses are comprised in each period of the synchronization signal;
a first detection unit configured to detect whether the synchronization signal is normal by determining whether parameters of all the pulses in the synchronization signal generated by the first generation unit are accurate; and
a first synchronization unit configured to perform time alignment on the pulses in the synchronization signal when the first detection unit detects that the synchronization signal is normal, so as to synchronize the to-be-processed signals,
wherein the first generation unit further comprises:
a second generation module configured to generate, in a phase-locked manner, a voltage phase signal that has the same period as the to-be-processed signals, and when a to-be-processed signal is a three-phase signal, generate the voltage phase signal in the phase-locked manner, or calculate the voltage phase signal according to the to-be-processed signals;
a second acquisition module configured to acquire phase points with a same number and a same phase angle value in each period of the voltage phase signal, wherein at least two of the phase points are acquired in each period; and
a third generation module configured to generate pulses at each of the phase points through a pulse generation apparatus, wherein all the obtained pulses are used as the synchronization signal that has the same period as the to-be-processed signals, and wherein widths of the pulses generated at the phase points that have the same phase angle value among all the periods of the voltage phase signal are the same.

4. The synchronization signal processing apparatus according to claim 3 , wherein among all the periods of the voltage phase signal, the widths of the pulses generated by the third generation module at the phase points that have different phase angle values are different.

Assignees

• Huawei Tech Co Ltd

Inventors

• Zou Jianlong
• Xi Yong

Classifications

• H02J3/40

  Synchronisation of generators for connection to a network or to another generator · CPC title

• G01R19/175

  Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero · CPC title

• H03L7/08 Primary

  Details of the phase-locked loop · CPC title

• H03K5/1536 Primary

  Zero-crossing detectors (in measuring circuits G01R19/175) · CPC title