Controlling turn on FETs of a hot plug device

US9306559B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9306559-B2
Application numberUS-201414256120-A
CountryUS
Kind codeB2
Filing dateApr 18, 2014
Priority dateApr 18, 2014
Publication dateApr 5, 2016
Grant dateApr 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computer program product for controlling the in rush current to a hot plug device. The computer program product includes program instructions that cause a processor to perform a method. The method includes providing a series of turn on pulses to the gates of a plurality of turn on FETs on a hot plug device coupled to a direct current power source, wherein each pulse causes the plurality of FETs to pass current from the direct current power source to a subsystem of the hot plug device, and wherein each pulse has a duration that ends before the impedance of the turn on FETs falls below a safe operating region. The method further includes providing a steady turn on signal to the FETs in response to the output voltage from the FETs to a subsystem of the hot plug device exceeding a predetermined voltage threshold.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product for controlling in rush current to a hot plug device, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising: providing a series of turn on pulses to the gates of a plurality of turn on FETs on a hot plug device coupled to a direct current power source, wherein each pulse causes the plurality of FETs to pass current from the direct current power source to a subsystem of the hot plug device, and wherein each pulse has a duration that ends before the impedance of the turn on FETs falls below a safe operating region; and providing a steady turn on signal to the FETs in response to the output voltage from the FETs to a subsystem of the hot plug device exceeding a predetermined voltage threshold. 2. The computer program product of claim 1 , the method further comprising: limiting the series of turn on pulses to no more than a predetermined number of turn on pulses; and providing no turn on signal to the FETs in response to the output voltage from the FETs to the subsystem of the hot plug device being less than the predetermined voltage threshold after the predetermined number of turn on pulses. 3. The method of claim 2 , wherein limiting the series of turn on pulses to no more than a predetermined number of turn on pulses prevents damage to the FETs. 4. The method of claim 2 , wherein limiting the series of turn on pulses to no more than a predetermined number of turn on pulses prevents tripping of the power supply. 5. The method of claim 2 , further comprising: providing a low impedance alert in response to the output voltage from the FETs to the subsystem of the hot plug device being less than the predetermined voltage threshold after the predetermined number of turn on pulses. 6. The computer program product of claim 1 , the method further comprising: detecting installation of the hot plug device in a host computer, wherein the series of turn on pulses are provided in response to detecting installation of the hot plug device in a host computer. 7. The computer program product of claim 1 , the method further comprising: automatically enabling one or more component of the hot plug device in response to the output voltage from the FETs to a subsystem of the hot plug device exceeding a voltage enabling threshold specific to the one or more component. 8. The method of claim 7 , wherein the one or more component includes a fan. 9. The method of claim 1 , wherein the time between pulses is greater than the duration of the pulses. 10. The method of claim 1 , wherein the predetermined voltage threshold is less than a target operating voltage for the hot plug device. 11. The method of claim 1 , wherein the hot plug device has a 12 Volt rail coupled between outputs of the FETs and the subsystem of the hot plug device. 12. The method of claim 11 , wherein the 12V rail is a capacitor resistor network having a time constant. 13. The method of claim 1 , wherein the output voltage from the FETs to a subsystem of the hot plug device increases after each pulse. 14. The method of claim 1 , wherein providing the series of turn on pulses to the plurality of turn on FETs cause the hot plug device to reach the turn on voltage with less power dissipation in the FETs than by providing a steady turn on signal to the plurality of turn on FETs. 15. The method of claim 1 , further comprising: monitoring an amount of current through the turn on FETs to a subsystem of the hot plug device.

Assignees

Inventors

Classifications

  • for protection · CPC title

  • H03K17/693Primary

    Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title

  • Live connection to bus, e.g. hot-plugging (current or voltage limitation during live insertion H02H9/004) · CPC title

  • for controlled semi-conductors which are not included in a specific circuit arrangement · CPC title

  • for electronic equipment (for converters H02H7/10; for electric measuring instruments G01R1/36; for DC voltage or current semiconductor regulators G05F1/569; for amplifiers H03F1/52; for electronic switching circuits H03K17/08) · CPC title

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What does patent US9306559B2 cover?
A computer program product for controlling the in rush current to a hot plug device. The computer program product includes program instructions that cause a processor to perform a method. The method includes providing a series of turn on pulses to the gates of a plurality of turn on FETs on a hot plug device coupled to a direct current power source, wherein each pulse causes the plurality of FE…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H03K17/693. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).