Master-slave flip-flop circuit and method of operating the master-slave flip-flop circuit

Patent metadata

Field	Value
Publication number	US-9306545-B2
Application number	US-201414154757-A
Country	US
Kind code	B2
Filing date	Jan 14, 2014
Priority date	Jan 14, 2014
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

A master-slave flip-flop circuit with a master latch and slave latch has clock generating circuitry which generates a gated clock signal based on the clock signal and a gating control signal. When the gating control signal has a first value, then the gated clock signal has a value dependent on the clock signal, while when the gating control signal has a second value then the gated clock signal has a fixed value independent of the clock signal. At least one component of the master-slave flip-flop circuit is controlled by the gated clock signal so that dynamic switching power can be reduced. The gating control signal is dependent on the input signal or a signal within the master latch and is independent of a slave signal in the slave latch and the output signal of the flip-flop.

First claim

I claim:

1. A master-slave flip-flop circuit for generating an output signal in response to an input signal and a clock signal, the master-slave flip-flop circuit comprising:
a master latch configured to capture a master signal dependent on the input signal during a first phase of the clock signal and to retain the master signal during a second phase of the clock signal;
a slave latch configured to capture a slave signal dependent on the master signal during the second phase of…

Assignees

• Advanced Risc Mach Ltd

Inventors

• Baratam Anil Kumar

Classifications

• H03K3/35625

  Electricity · mapped topic

• H03K3/012 Primary

  Electricity · mapped topic