Integrated circuit device substrates having packaged crystal resonators thereon

US9306537B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9306537-B1
Application numberUS-201414586508-A
CountryUS
Kind codeB1
Filing dateDec 30, 2014
Priority dateAug 30, 2013
Publication dateApr 5, 2016
Grant dateApr 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit device includes an integrated circuit substrate having a two piece package thereon. The package has a hermetically sealed cavity therein and a crystal resonator within the cavity. The crystal resonator includes at least one electrode electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package may include a material selected from a group consisting of glass and ceramics. The crystal resonator includes a crystal blank and first and second electrodes on first and second opposing sides of the crystal blank. The package includes a base having a recess therein and a cap hermetically sealed to the base. The cap includes first and second electrical traces thereon, which are electrically connected to the first and second electrodes of the crystal resonator.

First claim

Opening claim text (preview).

That which is claimed is: 1. An integrated circuit device, comprising: an integrated circuit substrate having an at least two piece package thereon, said package having a hermetically sealed cavity therein and a crystal resonator within the cavity, said crystal resonator comprising a crystal blank and first and second electrodes on first and second opposing sides of the crystal blank; wherein said package comprises a base having a recess therein and a cap hermetically sealed to the base, said cap having first and second electrical traces thereon, which are electrically connected to the first and second electrodes of the crystal resonator, respectively, and exposed to an interior of the cavity; and wherein the base comprises at least first and second electrically conductive vias therein that are electrically connected to the first and second electrical traces, respectively, by a pair of electrically conductive solder connectors, which extend across the cavity from the first and second electrically conductive vias in the base to the first and second electrical traces on the cap. 2. The integrated circuit device of claim 1 , wherein the package comprises a material selected from a group consisting of glass and ceramics. 3. The integrated circuit device of claim 1 , wherein a perimeter of the cavity is defined by a pair of opposing top and bottom electrically conductive seal rings on a bottom surface of the cap and an upper surface of the base, respectively. 4. The integrated circuit device of claim 3 , wherein the top and bottom electrically conductive seal rings are sealed together by a frame-shaped solder seal ring; and wherein the pair of electrically conductive solder connectors and the frame-shaped solder seal ring collectively mechanically support a seal between the base and cap. 5. The integrated circuit device of claim 4 , further comprising an electrically conductive ground shield on a top surface of said cap and an electrically conductive shield via extending through said cap, which electrically connects the ground shield to the frame-shaped solder seal ring. 6. The integrated circuit device of claim 5 , wherein said base comprises an electrically conductive ground via therein that electrically connects the frame-shaped solder seal ring to an electrical trace on the integrated circuit substrate. 7. The integrated circuit device of claim 1 , wherein the hermetically sealed cavity is devoid of any semiconductor-based electrical devices therein. 8. The integrated circuit device of claim 1 , wherein a bottom surface of said package is solder bonded to said integrated circuit substrate by at least a pair of solder bonds, which are electrically connected to an integrated circuit within said integrated circuit substrate and the first and second electrically conductive vias in said base. 9. The integrated circuit device of claim 1 , wherein said integrated circuit substrate comprises a semiconductor chip having active electrical components of an oscillator circuit therein; and wherein the at least one electrode is electrically coupled by the electrically conductive via to at least one of the active electrical components. 10. An integrated circuit device, comprising: a substrate having an at least two piece package thereon, which contains a sealed cavity and a crystal resonator mounted within the sealed cavity, said package comprising: a base having a first electrically conductive via extending at least partially therethrough; a cap sealed to the base, said cap having a first electrical trace thereon, which is exposed to the cavity and electrically connected to a first terminal of the crystal resonator; and a first electrically conductive solder connector in an interior of the cavity, said first solder connector extending across the cavity from the first electrically conductive via to a portion of the first electrical trace to thereby provide a cross-cavity electrical connection between the first electrically conductive via and the first electrical trace and at least partially mechanically support the seal between the base and cap. 11. The integrated circuit device of claim 10 , wherein a perimeter of the cavity is defined by a pair of opposing top and bottom electrically conductive seal rings on a bottom surface of the cap and an upper surface of the base, respectively; and wherein the top and bottom electrically conductive seal rings are sealed together by a solder seal ring, which at least partially mechanically supports the seal between the base and cap. 12. The integrated circuit device of claim 11 , wherein a height of the first solder connector and a height of the solder seal ring are equivalent. 13. The integrated circuit device of claim 10 , wherein the base has a recess therein and an inductor in the recess; and wherein the first solder connector is disposed outside the recess. 14. The integrated circuit device of claim 13 , wherein the crystal resonator is mounted to the cap and the first electrical trace by a first electrically conductive solder adhesion bump. 15. The integrated circuit device of claim 11 , further comprising: an electrically conductive ground shield on a top surface of the cap; an electrically conductive shield via in said cap, which electrically connects the ground shield to the solder seal ring; and an electrically conductive ground via in the base, which electrically connects the solder seal ring to a ground contact pad on a bottom surface of the base. 16. An integrated circuit device, comprising: a substrate having an at least two piece package thereon, which contains a sealed cavity and an electronic device mounted within the sealed cavity, said package comprising: a base having a first electrically conductive via extending at least partially therethrough; a cap sealed to the base, said cap having a first electrical trace thereon, which is exposed to the cavity and electrically connected to a first terminal of the electronic device; and a first electrically conductive solder connector in an interior of the cavity, said first solder connector extending across the cavity from the first electrically conductive via to a portion of the first electrical trace to thereby provide a cross-cavity electrical connection between the first electrically conductive via and the first electrical trace. 17. The integrated circuit device of claim 16 , wherein said package further comprises a second electrically conductive solder connector in the interior of the cavity, which provides a cross-cavity electrical connection between a second electrically conductive via in the base and a second electrical trace on the cap. 18. The integrated circuit device of claim 17 , wherein a perimeter of the cavity is defined by a pair of opposing top and bottom electrically conductive seal rings on a bottom surface of the cap and an upper surface of the base, respectively; and wherein the top and bottom electrically conductive seal rings are sealed together by a solder seal ring, which at least partially mechanically supports the seal between the base and cap. 19. The integrated circuit device of claim 18 , wherein a height of the first and second solder connectors and a height of the solder seal ring are equivalent. 20. The integrated circuit device of claim 16 , wherein the base has a recess therein and an inductor in the recess; and wherein the first solder connector is disposed outside the recess. 21. The integrated circuit device of claim 18 , further comprising: an electrically conductive

Assignees

Inventors

Classifications

  • Structural details of power oscillators, e.g. for heating {(construction of transmitters H04B; features of generators for heating by electromagnetic fields H05B6/00)} · CPC title

  • Electricity · mapped topic

  • H03H9/17Primary

    having a single resonator (crystal tuning forks H03H9/21) · CPC title

  • active element in amplifier being semiconductor device ({H03B5/323, H03B5/326} , H03B5/38 take precedence) · CPC title

  • Electricity · mapped topic

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What does patent US9306537B1 cover?
An integrated circuit device includes an integrated circuit substrate having a two piece package thereon. The package has a hermetically sealed cavity therein and a crystal resonator within the cavity. The crystal resonator includes at least one electrode electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially thr…
Who is the assignee on this patent?
Integrated Device Tech
What technology area does this patent fall under?
Primary CPC classification H03H9/17. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).