Class d amplification circuit
US-2024267007-A1 · Aug 8, 2024 · US
Methods and circuits to reduce pop noise in an audio device
US9306523B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9306523-B2 |
| Application number | US-201414478531-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 5, 2014 |
| Priority date | Sep 12, 2013 |
| Publication date | Apr 5, 2016 |
| Grant date | Apr 5, 2016 |
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Abstract
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A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
First claim
Opening claim text (preview).
What is claimed is: 1. A circuit, comprising: an analog signal input circuit configured to receive and amplify a differential analog signal and output an amplified differential analog signal; at least two integrating circuits coupled to output terminals of the analog signal input unit and configured to integrate the amplified differential analog signal; at least two pulse width modulating units coupled respectively to output terminals of the integrating units and configured to…
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Electricity · mapped topic
- H03F3/217Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9306523B2 cover?
- A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog outpu…
- Who is the assignee on this patent?
- Stmicroelectronics Shenzhen R&D Co Ltd, Stmicroelectronics Shenzhen R&D Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H03F3/217. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).