Power amplifier and distributed filter

Patent metadata

Field	Value
Publication number	US-9306511-B2
Application number	US-201313953955-A
Country	US
Kind code	B2
Filing date	Jul 30, 2013
Priority date	Jul 30, 2013
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

A system comprises a power amplifier configured to amplify an input signal, a splitter configured to split the amplified input signal into a plurality of output signals, a plurality of filters configured to filter the plurality of output signals, respectively, to produce a plurality of filtered output signals, and a combiner configured to combine the filtered output signals to produce a combined output signal.

First claim

The invention claimed is:

1. A system, comprising:
a power amplifier configured to amplify an input signal;
a splitter configured to split the amplified input signal into a plurality of output signals;
a plurality of filters configured to filter the plurality of output signals, respectively, to produce a plurality of filtered output signals; and
a combiner configured to combine the filtered output signals to produce a combined output signal, wherein the power amplifier outputs the plurality of output signals via a plurality of output ports, respectively; and
a plurality of input impedance matching circuits configured to match respective input impedances of the plurality of filters to respective output impedances of the plurality of output ports.

2. The system of claim 1 , wherein each of the plurality of filters comprises an acoustic resonator.

3. The system of claim 2 , wherein each of the acoustic resonators is a film bulk acoustic resonator (FBAR), a stacked bulk acoustic resonator (SBAR), a double bulk acoustic resonator (DBAR), a surface acoustic wave (SAW) resonator, or a bulk acoustic wave (BAW) resonator.

4. The system of claim 1 , further comprising a plurality of output impedance matching circuits configured to match respective output impedances of the plurality of filters to an input impedance of a device receiving the combined output signal.

5. The system of claim 4 , wherein each of the input impedance matching circuits and each of the output impedance matching circuits comprises an inductance-capacitance (LC) circuit.

6. The system of claim 1 , wherein the power amplifier comprises a plurality of field effect transistors (FETs) each having a gate receiving the input signal and a drain transmitting one of the plurality of output signals.

7. The system of claim 6 , wherein the power amplifier comprises a plurality of gain stages arranged in a sequence, and the plurality of FETs are located in an output stage of the sequence.

8. The system of claim 7 , wherein the splitter is located within the power amplifier between two of the sequential gain stages.

9. The system of claim 6 , wherein each of the plurality of FETs comprises a gallium arsenide (GaAs) pseudomorphic high electron mobility (pHEMT) transistor.

10. The system of claim 2 , wherein the combiner comprises a plurality of transmission lines, and each of the acoustic resonators is connected to at least one helper inductor.

11. The system of claim 1 , wherein the splitter is coupled to a plurality of transmission lines each coupled to one of the acoustic resonators.

12. The system of claim 1 wherein the input signal is a radio frequency (RF) signal or microwave frequency signal.

13. A method, comprising:
amplifying an input signal;
splitting the amplified input signal into a plurality of output signals;
filtering the plurality of output signals, respectively, to produce a plurality of filtered output signals; and
combining the filtered output signals to produce a combined, output signal, wherein the power amplifier outputs the plurality of output signals via a plurality of output ports, respectively; and
operating a plurality of input impedance matching circuits to match respective input impedances of the plurality of filters to respective output impedances of the plurality of output ports.

14. The method of claim 13 , wherein each of the plurality of filters comprises an acoustic resonator.

15. The method of claim 14 , wherein each of the acoustic resonators is a film bulk acoustic resonator (FBAR), a stacked bulk acoustic resonator (SBAR), or a double bulk acoustic resonator (DBAR), a surface acoustic wave (SAW) resonator, or a bulk acoustic wave (BAW) resonator.

16. The method of claim 13 , further comprising operating a plurality of output impedance matching circuits to match respective output impedances of the plurality of filters to an input impedance of a device receiving the combined output signal.

17. The method of claim 16 , wherein each of the input impedance matching circuits and each of the output impedance matching circuits comprises an inductance-capacitance (LC) circuit.

18. The method of claim 13 , Wherein the power amplifier comprises a plurality of field effect transistors (FETs) each having as gate receiving the input signal and a drain transmitting one of the plurality of output signals, wherein the plurality of FETs are arranged in parallel in an output stage of the power amplifier.

Assignees

• Avago Technologies General Ip

Inventors

• Chow Yut Hoong
• Chiok Wen Hue
• Chuah Ray Kooi Tatt

Classifications

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03H2250/00

  Indexing scheme relating to dual- or multi-band filters · CPC title

• H03H11/28

  Impedance matching networks · CPC title

• H03F3/193 Primary

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F2203/21157

  A filter circuit being added at the output of a power amplifier stage · CPC title