Oxide semiconductor layer and semiconductor device

US9306072B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9306072-B2
Application numberUS-201213660219-A
CountryUS
Kind codeB2
Filing dateOct 25, 2012
Priority dateOct 8, 2009
Publication dateApr 5, 2016
Grant dateApr 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In 2 Ga 2 ZnO 7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a substrate; a gate electrode layer over the substrate; a gate insulating layer over the gate electrode layer; a first oxide semiconductor layer over the gate insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; and a source electrode layer and a drain electrode layer electrically connected to the second oxide semiconductor layer, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor containing In, Ga, and Zn, wherein the second oxide semiconductor layer includes crystals each containing In, Ga, and Zn as main components, wherein in each of the crystals, a length in a c-axis direction is smaller than a length in an a-axis direction or a b-axis direction, and wherein the crystals are oriented so that c-axes of the crystals are almost vertical with respect to a surface of the second oxide semiconductor layer. 2. The semiconductor device according to claim 1 , wherein the crystals include a crystal structure of In 2 Ga 2 ZnO 7 . 3. The semiconductor device according to claim 1 , wherein the crystals include a crystal structure of InGaZnO 4 . 4. The semiconductor device according to claim 1 , wherein the crystals include a mix of crystal structures of In 2 Ga 2 ZnO 7 and InGaZnO 4 . 5. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer includes an amorphous region. 6. The semiconductor device according to claim 5 , wherein a Zn content is less than an In content or a Ga content in the amorphous region. 7. The semiconductor device according to claim 1 , further comprising an insulating layer covering the second oxide semiconductor layer. 8. The semiconductor device according to claim 1 , wherein a thickness of the second oxide semiconductor layer is 20 nm or less. 9. A semiconductor device comprising: a substrate; a first oxide semiconductor layer over the substrate; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer electrically connected to the second oxide semiconductor layer; a gate insulating layer over the second oxide semiconductor layer, the source electrode layer and the drain electrode layer; and a gate electrode layer over the gate insulating layer, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor containing In, Ga and Zn, wherein the second oxide semiconductor layer includes crystals each containing In, Ga, and Zn as main components, wherein in each of the crystals, a length in a c-axis direction is smaller than a length in an a-axis direction or a b-axis direction, and wherein the crystals are oriented so that c-axes of the crystals are almost vertical with respect to a surface of the second oxide semiconductor layer. 10. The semiconductor device according to claim 9 , wherein the crystals include a crystal structure of In 2 Ga 2 ZnO 7 . 11. The semiconductor device according to claim 9 , wherein the crystals include a crystal structure of InGaZnO 4 . 12. The semiconductor device according to claim 9 , wherein the crystals include a mix of crystal structures of In 2 Ga 2 ZnO 7 and InGaZnO 4 . 13. The semiconductor device according to claim 9 , wherein the first oxide semiconductor layer includes an amorphous region. 14. The semiconductor device according to claim 13 , wherein a Zn content is less than an In content or a Ga content in the amorphous region. 15. The semiconductor device according to claim 9 , wherein a thickness of the second oxide semiconductor layer is 20 nm or less.

Assignees

Inventors

Classifications

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

  • characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

  • Amorphous oxide semiconductors · CPC title

  • having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

  • Crystalline structures · CPC title

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Frequently asked questions

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What does patent US9306072B2 cover?
An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).