Bipolar transistor with lateral emitter and collector and method of production

Patent metadata

Field	Value
Publication number	US-9306017-B2
Application number	US-201213474605-A
Country	US
Kind code	B2
Filing date	May 17, 2012
Priority date	Dec 3, 2009
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

A bipolar transistor includes a substrate of semiconductor material, a high-mobility layer in the substrate, and a donor layer adjacent to the high-mobility layer. An emitter terminal forms an emitter contact on the donor layer, and a collector terminal forms a collector contact on the donor layer. A base terminal is electrically conductively connected with the high-mobility layer. The transistor can be produced in a HEMT technology or BiFET technology in GaAs.

First claim

What is claimed is:

1. A transistor, comprising:
a substrate of semiconductor material;
a high-mobility layer in the substrate;
a donor layer adjacent to the high-mobility layer, the donor layer having a first surface opposite the donor layer from the high-mobility layer;
an emitter terminal in direct contact with, and forming an emitter contact with, the first surface of the donor layer;
a collector terminal in direct contact with, and forming a collector contact with the first surface of the donor layer; and
a base terminal, which is electrically conductively connected with the high-mobility layer, wherein the base terminal is arranged outside a region extending between the emitter terminal and the collector terminal;
wherein the emitter contact comprises a first metal forming a first Schottky contact;
wherein the base terminal comprises a second metal forming a second Schottky contact;
wherein the second metal has a higher work function that the first metal; and
wherein the collector contact forms an ohmic contact.

2. The transistor of claim 1 , wherein the high-mobility layer forms a quantum well.

3. The transistor of claim 1 , wherein the high-mobility layer and/or the donor layer comprises Ga and As.

4. The transistor of claim 1 , wherein the emitter terminal and the collector terminal are interdigitated.

5. The transistor of claim 1 , wherein the emitter terminal is at least partially surrounded by the collector terminal in a layer.

6. The transistor of claim 1 , wherein the base terminal forms the second Schottky contact on a base contact region arranged between the high-mobility layer and the base terminal.

7. The transistor of claim 1 , further comprising a second base terminal disposed over and electrically conductively connected with the high-mobility layer, the emitter terminal and the collector terminal being arranged between the base terminal and the second base terminal.

8. The transistor of claim 1 , wherein the donor layer has a donor concentration between 10 14 cm −3 and 10 20 cm −3 .

9. The transistor of claim 1 , wherein the high-mobility layer forms a channel layer of a further transistor.

10. The transistor of claim 9 , wherein the further transistor comprises a HEMT.

11. The transistor of claim 7 , wherein the second base terminal is electrically conductively connected with the high-mobility layer.

12. The transistor of claim 1 , wherein the emitter contact comprises a Schottky emitter contact and the collector contact comprises a Schottky collector contact.

13. The transistor of claim 1 , wherein different metals with different work functions are provided for the terminals;
wherein the base terminal forms a Schottky contact in which the metal has a higher work function than a work function of the emitter contact.

14. The transistor of claim 1 , wherein the collector contact is a Schottky contact having a work function that is equal to or smaller than a work function of the emitter contact.

15. A transistor, comprising:
a substrate of semiconductor material;
a high-mobility layer in the substrate;
a donor layer adjacent to the high-mobility layer, the donor layer having a first surface opposite the donor layer from the high-mobility layer;
an emitter terminal in direct contact with, and forming an emitter contact with, the first surface of the donor layer;
a collector terminal in direct contact with, and forming a collector contact with, the first surface of the donor layer; and
a base terminal, which is electrically conductively connected to the high-mobility layer, wherein the base terminal is arranged outside of a region extending between the emitter terminal and the collector terminal;
wherein the emitter contact, the collector contact and the base terminal comprise different metals forming Schottky contacts and having different work functions;
wherein the work function of the base terminal is higher than the work function of the emitter contact; and
wherein the work function of the collector contact is smaller than the work function of the emitter contact.

16. The transistor of claim 15 , wherein the high-mobility layer forms a quantum well.

17. The transistor of claim 15 , wherein the high-mobility layer and/or the donor layer comprises Ga and As.

18. The transistor of claim 15 , wherein the emitter terminal and the collector terminal are interdigitated.

19. The transistor of claim 15 , wherein the emitter terminal is at least partially surrounded by the collector terminal in a layer.

20. The transistor of claim 15 , further comprising a second base terminal disposed over and electrically conductively connected with the high-mobility layer, the emitter terminal and the collector terminal being arranged between the base terminal and the second base terminal.

21. The transistor of claim 15 , wherein the base terminal forms a Schottky contact on a base contact region arranged between the high-mobility layer and the base terminal.

22. The transistor of claim 15 , wherein the donor layer has a donor concentration between 10 14 cm −3 and 10 20 cm −3 .

23. The transistor of claim 15 , wherein the high-mobility layer forms a channel layer of a further transistor.

24. A method of producing the transistor of claim 1 , the method comprising:
forming the high-mobility layer in the substrate of semiconductor material;
forming the donor layer adjacent to the high-mobility layer;
forming the emitter terminal to form the emitter contact to the surface of the donor layer;
forming the collector terminal to form the collector contact to the surface of the donor layer; and
forming the base terminal.

25. A method of producing the transistor of claim 12 , the method comprising:
forming an n-doped donor layer such that the high-mobility layer is adjacent to the donor layer; and
applying a metallization to form the Schottky emitter contact and the Schottky collector contact on the donor layer and to form the base terminal that is electrically conductively connected with the high-mobility layer.

26. The method of claim 25 , further comprising:
forming a base contact region, the base contact region being between the base terminal and the high-mobility layer; and
forming an ohmic contact or a Schottky contact between the base terminal and the base contact region.

27. The method of claim 25 , further comprising:
forming the emitter terminal to provide the Schottky emitter contact and the collector terminal to provide the Schottky collector contact, the emitter terminal and the collector terminal being formed in the shape of a gate electrode of a dual-gate HEMT.

28. The method of claim 25 , wherein the transistor is produced in a HEMT technology in GaAs or in a BiFET technology in GaAs.

Assignees

• Van Den Oever Léon C M
• Hueting Ray J E
• Epcos Ag

Inventors

• Van Den Oever Léon C M
• Hueting Ray J E

Classifications

• H10D30/4755

  having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs · CPC title

• H10D64/411 Primary

  for FETs · CPC title

• H01L29/42316 Primary

  Electricity · mapped topic

• H01L29/7787

  Electricity · mapped topic