Image sensors having deep trenches including negative charge material

US9305947B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9305947-B2
Application numberUS-201514624751-A
CountryUS
Kind codeB2
Filing dateFeb 18, 2015
Priority dateFeb 27, 2014
Publication dateApr 5, 2016
Grant dateApr 5, 2016

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Abstract

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Image sensors are provided including a substrate defining a plurality of pixel regions, the substrate having a first surface and a second surface opposite the first surface. The second surface of the substrate is configured to receive light incident thereon and the substrate defines a deep trench extending from the second surface of the substrate toward the first surface substrate and separating the plurality of pixel regions from each other. In each of the plurality of pixel regions of the substrate, a photoelectric conversion region is provided. A gate electrode is provided on the photoelectric conversion region and a negative fixed charge layer covering the second surface of the substrate and at least a portion of a sidewall of the deep trench is also provided. The image sensors further include a shallow device isolation layer on the first surface of the substrate. The shallow device isolation layer defines an active region in each of the pixel regions and the negative fixed charge layer contacts the shallow device isolation layer.

First claim

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What is claimed is: 1. An image sensor comprising: a substrate defining a plurality of pixel regions, the substrate having a first surface and a second surface opposite the first surface, wherein the second surface of the substrate is configured to receive light incident thereon and wherein the substrate defines a deep trench extending from the second surface of the substrate toward the first surface of the substrate and separating the plurality of pixel regions from each other; in each of the plurality of pixel regions of the substrate, a photoelectric conversion region; a gate electrode on the photoelectric conversion region; a negative fixed charge layer covering the second surface of the substrate and at least a portion of a sidewall of the deep trench; and a shallow device isolation layer on the first surface of the substrate, wherein the shallow device isolation layer defines an active region in each of the pixel regions and wherein the negative fixed charge layer contacts the shallow device isolation layer. 2. The image sensor of claim 1 , wherein the negative fixed charge layer comprises a metal oxide layer including one or more of hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), titanium (Ti), yttrium (Y), and lanthanide. 3. The image sensor of claim 1 , wherein the negative fixed charge layer comprises a metal oxide layer including of Hafnium (Hf). 4. The image sensor of claim 1 , wherein the gate electrode on the first surface of the substrate extends toward the second surface of the substrate. 5. The image sensor of claim 1 , wherein the negative fixed charge layer comprises a bottom surface spaced apart from at least one of top and bottom surfaces of the shallow device isolation layer. 6. The image sensor of claim 5 , wherein the bottom surface and a lower sidewall of the negative fixed charge layer contact the shallow device isolation layer. 7. The image sensor of claim 1 , wherein the negative fixed charge layer extends inside the shallow device isolation layer. 8. The image sensor of claim 1 , further comprising a filling insulation layer contacting the negative fixed charge layer in the deep trench and extending toward the second surface of the substrate. 9. The image sensor of claim 1 , further comprising an air-gap region in the deep trench. 10. The image sensor of claim 1 , further comprising a polysilicon pattern in the deep trench, wherein the negative fixed charge layer contacts the polysilicon pattern. 11. The image sensor of claim 1 , further comprising: a channel stop layer adjacent to the first surface of the substrate and defining an active region in each of the pixel regions; and an inter-dielectric layer covering the first surface of the substrate, wherein the negative fixed charge layer contacts the inter-dielectric layer. 12. The image sensor of claim 1 , further comprising: a channel stop layer adjacent to the first surface of the substrate and defining an active region in each of the pixel regions; an inter-dielectric layer covering the first surface of the substrate; and an etch stop layer between the first surface and the inter-dielectric layer, wherein the negative fixed charge layer contacts the etch stop layer. 13. The image sensor of claim 1 , further comprising: a polysilicon pattern under the deep trench; and an insulation liner pattern filling a space between the polysilicon pattern and a lower sidewall of the deep trench, wherein the negative fixed charge layer contacts top surfaces of the polysilicon pattern and the insulation liner pattern. 14. The image sensor of claim 1 , further comprising an impurity doped region on the substrate adjacent to the sidewall of the deep trench. 15. The image sensor of claim 1 , wherein the deep trench includes a bottom surface in the shallow device isolation layer, the bottom surface of the deep trench having a crooked shape. 16. The image sensor of claim 15 , wherein the negative fixed charge layer covers the sidewall and the bottom surface of the deep trench, wherein the image sensor further comprises a filling insulation layer filling the deep trench, the filling insulation layer having a reverse Y shape in the deep trench.

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Classifications

  • characterised by the gate of the transistor · CPC title

  • Microlenses · CPC title

  • Colour filters · CPC title

  • Disposition of the elements in pixels, e.g. smaller elements in the centre of the imager compared to larger elements at the periphery · CPC title

  • Arrangements for transferring the charges in the image sensor perpendicular to the imaging plane, e.g. buried regions used to transfer generated charges to circuitry under the photosensitive region · CPC title

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What does patent US9305947B2 cover?
Image sensors are provided including a substrate defining a plurality of pixel regions, the substrate having a first surface and a second surface opposite the first surface. The second surface of the substrate is configured to receive light incident thereon and the substrate defines a deep trench extending from the second surface of the substrate toward the first surface substrate and separatin…
Who is the assignee on this patent?
Ihara Hisanori, Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10F39/807. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).