BEOL interconnect with carbon nanotubes

Patent metadata

Field	Value
Publication number	US-9305838-B2
Application number	US-201213601963-A
Country	US
Kind code	B2
Filing date	Aug 31, 2012
Priority date	Aug 31, 2011
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

An integrated circuit with BEOL interconnects may comprise: a substrate including a semiconductor device; a first layer of dielectric over the surface of the substrate, the first layer of dielectric including a filled via for making electrical contact to the semiconductor device; and a second layer of dielectric on the first layer of dielectric, the second layer of dielectric including a trench running perpendicular to the longitudinal axis of the filled via, the trench being filled with an interconnect line, the interconnect line comprising cross-linked carbon nanotubes and being physically and electrically connected to the filled via. Cross-linked CNTs are grown on catalyst particles on the bottom of the trench using growth conditions including a partial pressure of precursor gas greater than the transition partial pressure at which carbon nanotube growth transitions from a parallel carbon nanotube growth mode to a cross-linked carbon nanotube growth mode.

First claim

What is claimed is:

1. A method of fabricating an interconnect, comprising:
providing a substrate including a semiconductor device, a first layer of dielectric over the surface of said substrate and a second layer of dielectric on said first layer of dielectric, wherein said first layer of dielectric includes a filled via making electrical contact to said semiconductor device and said second layer of dielectric including an interconnect trench running perpendicular to the longitudinal axis of said filled via and exposing said filled via;
depositing catalyst particles over the surface of said second layer of dielectric and the surfaces of said first layer of dielectric and said filled via exposed by said trench;
growing cross-linked carbon nanotubes on said catalyst particles in a single process, said cross-linked carbon nanotubes being grown directly as cross-linked carbon nanotubes, said cross-linked carbon nanotubes being grown to a height greater than the depth of said trench;
depositing a material in a void space of said cross-linked carbon nanotubes, forming a carbon nanotube composite; and
removing said carbon nanotube composite and said catalyst from the top surface of said second layer of dielectric, leaving an interconnect line in said trench
wherein said growing cross-linked carbon nanotubes comprises growing by chemical vapor deposition in a chamber containing a precursor gas and selecting growth conditions including a partial pressure of precursor gas greater than the transition partial pressure at which carbon nanotube growth transitions from a parallel carbon nanotube growth mode to a cross-linked carbon nanotube growth mode.

2. The method of claim 1 , further comprising, prior to catalyst deposition, depositing a barrier layer over the surface of said second layer of dielectric and the surfaces of said first layer of dielectric and said filled via exposed by said trench.

3. The method of claim 2 , wherein said removing further comprises removing said barrier layer from the top surface of said second layer of dielectric.

4. The method of claim 2 , wherein said barrier layer comprises tantalum.

5. The method of claim 2 , wherein said barrier layer comprises titanium nitride.

6. The method of claim 1 , wherein said material is a metal.

7. The method of claim 6 , wherein said metal is chosen from the group consisting of copper, cobalt and tungsten.

8. The method of claim 6 , wherein said metal is electrodeposited.

9. The method of claim 1 , wherein said material is a low-k dielectric.

10. The method of claim 1 , wherein said removing further comprises removing the portion of said carbon nanotube composite filling said trench which exceeds the height of said second layer of dielectric to provide said interconnect line with a top surface coplanar with the top surface of said second layer of dielectric.

11. A method of fabricating an interconnect, comprising:
providing a substrate including a semiconductor device, a first layer of dielectric over the surface of said substrate and a second layer of dielectric on said first layer of dielectric, wherein said first layer of dielectric includes a via for making electrical contact to said semiconductor device and said second layer of dielectric including an interconnect trench running perpendicular to the longitudinal axis of said filled via and exposing said filled via;
depositing catalyst particles over the surface of said second layer of dielectric and the surfaces of said first layer of dielectric and said semiconductor device exposed by said via;
growing cross-linked carbon nanotubes on said catalyst particles in a single process, said cross-linked carbon nanotubes being grown directly as cross-linked carbon nanotubes, said cross-linked carbon nanotubes being grown to a height greater than the depth of said trench;
depositing a material in a void space of said cross-linked carbon nanotubes, forming a carbon nanotube composite; and
removing said carbon nanotube composite and said catalyst from the top surface of said second layer of dielectric, leaving a filled via and an interconnect line in said trench
wherein said growing cross-linked carbon nanotubes comprises growing by chemical vapor deposition in a chamber containing a precursor gas and selecting growth conditions including a partial pressure of precursor gas greater than the transition partial pressure at which carbon nanotube growth transitions from a parallel carbon nanotube growth mode to a cross-linked carbon nanotube growth mode.

12. The method of claim 11 , wherein said material is a metal.

13. The method of claim 11 , wherein said material is a low-k dielectric.

14. The method of claim 1 , wherein said precursor gas is selected from the group consisting of xylene and ethanol.

15. The method of claim 11 , wherein said precursor is selected from the group consisting of xylene and ethanol.

Assignees

• Narwankar Pravin K
• Griffith Cruz Joe
• Sundarrajan Arvind
• Narasimhan Murali
• Sreekala Subbalakshmi
• Pushparaj Victor
• Applied Materials Inc

Inventors

• Narwankar Pravin K
• Griffith Cruz Joe
• Sundarrajan Arvind
• Narasimhan Murali
• Sreekala Subbalakshmi
• Pushparaj Victor

Classifications

• H10W70/635

  Through-vias · CPC title

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W20/033

  in openings in dielectrics · CPC title

• H10W20/056 Primary

  by filling conductive material into holes, grooves or trenches · CPC title

• A61K8/8182

  Copolymers of vinyl-pyrrolidones. Compositions of derivatives of such polymers · CPC title