Display panel with pre-charging operations, and method for driving the same

Patent metadata

Field	Value
Publication number	US-9305503-B2
Application number	US-201514717039-A
Country	US
Kind code	B2
Filing date	May 20, 2015
Priority date	Nov 18, 2011
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

A display panel includes a switch control circuit, a first pre-charge switch circuit and a second pre-charge switch circuit. The switch control circuit is used for comparing the most significant bits (MSBs) of data signals to generate switch control signals for controlling the first and second pre-charge switch circuits, such that data lines are pre-charged through the first and second pre-charge switch circuits respectively. A method for driving a display panel is also provided herein.

First claim

What is claimed is:

1. A display panel, comprising:
a plurality of data lines comprising a first data line and a second data line adjacent to the first data line; and
a source driver coupled to the data lines, the source driver comprising:
a first latching circuit for sequentially sampling input data signals and successively generating a first former sample data signal and a first latter sample data signal, wherein the first latching circuit outputs the first former sample data signal when the first latter sample data signal is generated;
a second latching circuit for sequentially sampling the input data signals and successively generating a second former sample data signal and a second latter sample data signal, wherein the second latching circuit outputs the second former sample data signal when the second latter sample data signal is generated;
a transmission switch circuit coupled to the first data line and the second data line, wherein the transmission switch circuit is activated in accordance with a polarity signal and a control signal, such that a first output data signal corresponding to the first former sample data signal and a second output data signal corresponding to the second former sample data signal are transmitted through the transmission switch circuit;
a switch control circuit coupled to the first latching circuit and the second latching circuit for comparing the most significant bit (MSB) of the first former sample data signal with the MSB of the first latter sample data signal and comparing the MSB of the second former sample data signal with the MSB of the second latter sample data signal, thereby generating a first switch control signal and a second switch control signal;
a first pre-charge switch circuit coupled to the first data line and the switch control circuit, wherein the first pre-charge switch circuit is activated in accordance with the first switch control signal, the polarity signal and the control signal when the transmission switch circuit is deactivated, such that the first data line is pre-charged by one of a first pre-charge voltage and a second pre-charge voltage through the first pre-charge switch circuit; and
a second pre-charge switch circuit coupled to the second data line and the switch control circuit, wherein the second pre-charge switch circuit is activated in accordance with the second switch control signal, the polarity signal and the control signal when the transmission switch circuit is deactivated, such that the second data line is pre-charged by the other of the first pre-charge voltage and the second pre-charge voltage through the second pre-charge switch circuit.

2. The display panel as claimed in claim 1 , wherein the switch control circuit further comprises:
a first multiplexing circuit having a first input end, a second input end, a first output end and a second output end, wherein the first input end of the first multiplexing circuit is used for receiving the MSB of the first latter sample data signal, and the second input end of the first multiplexing circuit is used for receiving the MSB of the second latter sample data signal;
a second multiplexing circuit having a first input end, a second input end, a first output end and a second output end, wherein the first input end of the second multiplexing circuit is used for receiving the MSB of the first former sample data signal, and the second input end of the second multiplexing circuit is used for receiving the MSB of the second former sample data signal;
a first XOR gate having a first input end, a second input end and an output end, wherein the first input end of the first XOR gate is coupled to the first output end of the first multiplexing circuit, and the second input end of the first XOR gate is coupled to the first output end of the second multiplexing circuit, and the output end of the first XOR gate is used for outputting a first comparison signal; and
a second XOR gate having a first input end, a second input end and an output end, wherein the first input end of the second XOR gate is coupled to the second output end of the first multiplexing circuit, and the second input end of the second XOR gate is coupled to the second output end of the second multiplexing circuit, and the output end of the second XOR gate is used for outputting a second comparison signal.

3. The display panel as claimed in claim 2 , wherein the switch control circuit further comprises:
a first D-type flip-flop for receiving the first comparison signal and outputting the first comparison signal after being triggered by the control signal;
a first level shifter for processing the first comparison signal outputted by the first D-type flip-flop so as to output the first switch control signal;
a second D-type flip-flop for receiving the second comparison signal and outputting the second comparison signal after being triggered by the control signal;
a second level shifter for processing the second comparison signal outputted by the second D-type flip-flop so as to output the first switch control signal.

4. The display panel as claimed in claim 1 , wherein
the first pre-charge switch circuit further comprises:
a first switch coupled to the first data line for conducting the first data line to the first pre-charge voltage; and
a second switch which is coupled to the first data line and is connected in series with the first switch for conducting the first data line to the second pre-charge voltage; and

the second pre-charge switch circuit further comprises:
a third switch coupled to the second data line for conducting the second data line to the first pre-charge voltage; and
a fourth switch which is coupled to the second data line and is connected in series with the first switch for conducting the second data line to the second pre-charge voltage.

5. The display panel as claimed in claim 4 , wherein the transmission switch circuit further comprises:
a fifth switch coupled to the first data line for transmitting the first output data signal to the first data line when being conducted;
a sixth switch which is connected in series with the fifth switch and is coupled to the second data line for transmitting the first output data signal to the second data line when being conducted;
a seventh switch coupled to the first data line for transmitting the second output data signal to the first data line when being conducted; and
an eighth switch which is connected in series with the seventh switch and is coupled to the second data line for transmitting the second output data signal to the second data line when being conducted.

6. The display panel as claimed in claim 1 , wherein
the first latching circuit further comprises:
a first latching unit for outputting the first latter sample data signal;
a first multiplexing unit having a first input end and a second input end, wherein the first input end of the first multiplexing unit is coupled to an output end of the first latching unit; and
a second latching unit coupled to an output end of the first multiplexing unit for outputting the first former sample data signal; and

the second latching circuit further comprises:
a third latching unit for outputting the second latter sample data signal;
a second multiplexing unit having a first input end and a second input end, wherein the first input end of the second multiplexing unit is coupled to an output end of the third latching unit; and
a fourth latching unit coupled to an output end of the second multiplexing unit for outputting the second former sample data signal;

wherein the second input end of the first multiplexing unit is coupled to the output end of the third latching unit, and the second input end of the second multiplexing unit is coupled to the output end of the first latching

Assignees

• Au Optronics Corp

Inventors

• Wu Meng-Ju
• Chung Chun-Fan
• Ho Yu-Hsi

Classifications

• G09G2320/103

  Detection of image changes, e.g. determination of an index representative of the image change · CPC title

• G09G3/3688 Primary

  suitable for active matrices only · CPC title

• G09G3/3614 Primary

  Control of polarity reversal in general · CPC title

• G09G2310/0294

  Details of sampling or holding circuits arranged for use in a driver for data electrodes · CPC title

• G09G2310/0297

  Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns · CPC title