Electronic system with memory control mechanism and method of operation thereof
US-2015363312-A1 · Dec 17, 2015 · US
Computer system and cache control method
US9304918B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9304918-B2 |
| Application number | US-201414287206-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 27, 2014 |
| Priority date | May 28, 2013 |
| Publication date | Apr 5, 2016 |
| Grant date | Apr 5, 2016 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A computer system, comprising: a server; and a storage system, the server including an operating system, the storage system including a storage control part, wherein the operating system is configured to: transmit a read request for first data to the storage system in a case of receiving the read request for the first data not stored in a server cache from an application; store the first data received from the storage system into the server cache, and wherein the storage control part is configured to: read the first data from the storage cache, transmit the read first data to the server, and invalidate the first data stored in the storage cache.
First claim
Opening claim text (preview).
What is claimed is: 1. A computer system, comprising: a server, on which an application runs; and a storage system for storing data to be used by the application, the server including a first processor, a first memory, a cache device, in which a server cache for temporarily storing data is set up, and a first interface for coupling to another apparatus, the storage system including a controller and a plurality of storage devices, the controller including a second processor…
Assignees
Inventors
Classifications
- G06F12/0871Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9304918B2 cover?
- A computer system, comprising: a server; and a storage system, the server including an operating system, the storage system including a storage control part, wherein the operating system is configured to: transmit a read request for first data to the storage system in a case of receiving the read request for the first data not stored in a server cache from an application; store the first data r…
- Who is the assignee on this patent?
- Hitachi Ltd
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0871. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).