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US-12174739-B2 · Dec 24, 2024 · US
Virtualization system using hardware assistance for page table coherence
US9304915B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9304915-B2 |
| Application number | US-201414487939-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 16, 2014 |
| Priority date | Mar 27, 2009 |
| Publication date | Apr 5, 2016 |
| Grant date | Apr 5, 2016 |
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Abstract
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One embodiment of the present invention includes a method for maintaining a shadow page table in at least partial correspondence with guest page mappings of a guest computation. The method marking with a traced write indication at least those entries of the shadow page table that map physical memory locations which themselves encode the guest page mappings, the marking identifying, for a hardware facility, a subset of memory access targets for which updates are to be recorded in a guest write buffer accessible to the virtualization system. Responsive to a coherency-inducing operation of the guest computation, the method reads from the guest write buffer and introduces corresponding updates into the shadow page table.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of operating a virtualization system, the method comprising: supplying underlying hardware with indications of those locations in physical memory for which the virtualization system is to receive buffered write information, the indicated locations corresponding to those that encode page mapping information of a guest operating system executing in a virtual machine of the virtualization system; and asynchronous with write-type accesses performed fo…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9304915B2 cover?
- One embodiment of the present invention includes a method for maintaining a shadow page table in at least partial correspondence with guest page mappings of a guest computation. The method marking with a traced write indication at least those entries of the shadow page table that map physical memory locations which themselves encode the guest page mappings, the marking identifying, for a hardwa…
- Who is the assignee on this patent?
- Vmware Inc
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0802. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).