Data processor having dynamic control of instruction prefetch buffer depth and method therefor

Patent metadata

Field	Value
Publication number	US-9304773-B2
Application number	US-38546306-A
Country	US
Kind code	B2
Filing date	Mar 21, 2006
Priority date	Mar 21, 2006
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

A data processor ( 102 ) includes a prefetch buffer ( 112 ) and a fetch control unit ( 116 ). The prefetch buffer ( 112 ) has a plurality of lines. The prefetch buffer ( 112 ) has a variable maximum depth that defines a number of lines of the plurality of lines that are capable of storing instructions. The fetch control unit ( 116 ) is coupled to the prefetch buffer to monitor at least one of the plurality of lines of the prefetch buffer ( 112 ) and to adjust the variable maximum depth of the prefetch buffer ( 112 ) in response to a state of the data processor ( 102 ).

First claim

What is claimed is:

1. A data processor comprising:
a prefetch buffer comprising a plurality of lines, the prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion and the prefetch buffer having a variable maximum depth that defines a number of lines of the plurality of lines that are capable of storing instructions; and
a fetch control unit coupled to the prefetch buffer to adjust, during operation of the data processor, the variable maximum depth of the prefetch buffer in response to an instruction type, wherein the fetch control unit is further configured to adjust the variable maximum depth in response to a starvation condition of the prefetch buffer.

2. The data processor of claim 1 , wherein the fetch control unit further is to monitor a first line of the prefetch buffer, determined by the variable maximum depth, and to initiate an instruction fetch when the first line is empty.

3. The data processor of claim 1 , wherein the fetch control unit is adapted to set the variable maximum depth of the prefetch buffer to a first predetermined depth or to a second predetermined depth.

4. The data processor of claim 1 wherein the fetch control unit sets the variable maximum depth of the prefetch buffer to a first predetermined depth or a second predetermined depth in response to the instruction type.

5. The data processor of claim 4 , wherein the instruction type comprises one of 32-bit instructions and 16-bit instructions.

6. The data processor of claim 1 , wherein the starvation condition comprises a frequency of instruction starvation exceeding a threshold and the fetch control unit increases the variable maximum depth in response to the starvation condition.

7. The data processor of claim 1 , wherein the starvation condition comprises whether the prefetch buffer is not averaging close to starvation.

8. The data processor of claim 7 , wherein the fetch control unit determines whether the prefetch buffer is averaging close to starvation by monitoring a state of a plurality of lines of the prefetch buffer.

9. A data processor comprising:
a register for storing an instruction prefetch control value that indicates that the data processor is operating in a selected one of a plurality of modes;
a prefetch buffer comprising a plurality of lines, the prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion and the prefetch buffer having a variable maximum depth that defines a number of lines of the plurality of lines that are capable of storing instructions; and
a fetch control unit coupled to the prefetch buffer and to the register, the fetch control unit controlling the variable maximum depth in response to the instruction prefetch control value and adjusting the variable maximum depth during operation of the data processor in response to a starvation condition of the prefetch buffer.

10. The data processor of claim 9 , wherein the fetch control unit sets the variable maximum depth of the prefetch buffer to a first predetermined depth or to a second predetermined depth in response to the instruction prefetch control value being respectively a first value or a second value.

11. The data processor of claim 9 , wherein the fetch control unit increases or decreases the variable maximum depth of the prefetch buffer dynamically in response to a starvation condition of the prefetch buffer.

12. A method comprising:
providing a data processor having a prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion, the prefetch buffer having a plurality of lines;
setting, during operation of the data processor, a variable maximum depth of the prefetch buffer as a number of lines of the plurality of lines that are capable of storing instructions;
fetching instructions into the prefetch buffer using the variable maximum depth; and
dynamically adjusting the variable maximum depth in response to a state of the data processor based on a starvation condition of the prefetch buffer.

13. The method of claim 12 , wherein dynamically adjusting comprises:
monitoring a starvation condition of the prefetch buffer;
if a rate of starvation of the prefetch buffer exceeds a threshold, then increasing the variable maximum depth; and
if the prefetch buffer is not averaging close to starvation, then decreasing the variable maximum depth.

14. The method of claim 13 , further comprising:
outputting instructions from the prefetch buffer; and
decoding instructions so outputted for execution by the data processor.

15. A method comprising:
providing a data processor having a prefetch buffer to store instructions in a first-in, first-out (FIFO) fashion, the prefetch buffer having a plurality of lines;
setting a variable maximum depth of the prefetch buffer to a first predetermined depth;
fetching instructions of a first instruction type into the prefetch buffer;
subsequently fetching instructions of a second instruction type into the prefetch buffer;
changing the variable maximum depth of the prefetch buffer from the first predetermined depth to a second predetermined depth in response to fetching instructions of the second instruction type; and
adjusting the variable maximum depth in response to a starvation condition of the prefetch buffer.

16. The method of claim 15 , wherein fetching instructions of the first instruction type comprises fetching 32-bit instructions, and fetching instructions of the second instruction type comprises fetching 16-bit instructions.

17. The method of claim 15 , wherein fetching instructions of the first instruction type comprises fetching 32-bit instructions, and fetching instructions of the second instruction type comprises fetching variable-length instructions.

18. The method of claim 15 , wherein the adjusting the variable maximum depth in response to the starvation condition of the prefetch buffer comprises:
increasing the variable maximum depth in response to the starvation condition, wherein starvation condition comprises a frequency of instruction starvation exceeding a threshold.

19. The method of claim 15 , wherein the adjusting the variable maximum depth in response to the starvation condition of the prefetch buffer comprises:
adjusting the variable maximum depth in response to the prefetch buffer averaging close to starvation.

20. The method of claim 19 , wherein the adjusting the variable maximum depth in response to the prefetch buffer averaging close to starvation comprises:
monitoring a state of a plurality of lines of the prefetch buffer.

Assignees

• Scott Jeffrey W
• Moyer William C
• Freescale Semiconductor Inc

Inventors

• Scott Jeffrey W
• Moyer William C

Classifications

• G06F9/3802 Primary

  Instruction prefetching · CPC title

• G06F9/3814

  Implementation provisions of instruction buffers, e.g. prefetch buffer; banks · CPC title

• G06F12/0862

  with prefetch · CPC title

• G06F9/30149

  of variable length instructions · CPC title

• Y02B60/1225

  Cross-Sectional Technologies · mapped topic