Method to improve reliability of high-K metal gate stacks

Patent metadata

Field	Value
Publication number	US-9299802-B2
Application number	US-201213662505-A
Country	US
Kind code	B2
Filing date	Oct 28, 2012
Priority date	Oct 28, 2012
Publication date	Mar 29, 2016
Grant date	Mar 29, 2016

Abstract

A method of fabricating a gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over an area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; annealing the replacement gate structure in an ambient atmosphere containing hydrogen; and depositing a gap fill layer.

First claim

We claim:

1. A method of fabricating a gate stack for a semiconductor device, said method comprising steps of:
after removal of a dummy gate, providing a replacement gate structure by performing steps of:
growing a high-k dielectric layer over an area vacated by the dummy gate;
depositing a first metal layer comprising at least one of TiN, TaN, TiC, and TaC over the high-k dielectric layer of a thickness between 10 and 50 angstroms, over the high-k dielectric layer;
annealin…

Assignees

• IBM

Inventors

• Ando Takashi
• Cartier Eduard A
• Linder Barry P
• Narayanan Vijay

Classifications

• H10P95/94

  Electricity · mapped topic

• H10P95/90

  Electricity · mapped topic

• H10P52/402

  Electricity · mapped topic

• H10P14/44

  Electricity · mapped topic

• H10P14/43

  Electricity · mapped topic