Power semiconductor module

Patent metadata

Field	Value
Publication number	US-9299628-B2
Application number	US-201214131581-A
Country	US
Kind code	B2
Filing date	Jul 5, 2012
Priority date	Jul 11, 2011
Publication date	Mar 29, 2016
Grant date	Mar 29, 2016

Abstract

A power semiconductor module is provided which is capable of keeping low the degrees of increases in temperatures of wide bandgap semiconductor elements, reducing the degree of increase in chip's total surface area of the wide bandgap semiconductor elements, and being fabricated at low costs, when Si semiconductor elements and the wide bandgap semiconductor elements are placed within one and the same power semiconductor module. The Si semiconductor elements are placed in a central region of the power semiconductor module, and the wide bandgap semiconductor elements are placed on opposite sides relative to the central region or in edge regions surrounding the central region.

First claim

The invention claimed is:

1. A power semiconductor module comprising:
an insulative substrate;
a plurality of silicon semiconductor elements located in a first region of the substrate;
a plurality of wide bandgap semiconductor elements located in a second region of the substrate;
all of the silicon semiconductor elements being located in the first region;
the second region containing the entire area of the substrate excluding the first region; and
the wide bandgap semiconductor elements in the second region being adjacent to two adjoining sides of the first region.

2. The power semiconductor module of claim 1 , comprising:
a plurality of insulative substrates each having first and second regions;
a plurality of silicon semiconductor elements located in a first region of each the substrates;
a plurality of wide bandgap semiconductor elements located in a second region of each of the substrates;
all of the silicon semiconductor elements for a corresponding one of the insulative substrates being located in a respective one of the first regions;
each second region containing the entire area of a corresponding substrate excluding a corresponding first region; and
the wide bandgap semiconductor elements in each second region being adjacent to two adjoining sides of the corresponding first region.

3. The power semiconductor module of claim 2 , comprising:
the plurality of insulative substrates being arranged such the wide bandgap semiconductor elements in the second regions surround the silicon semiconductor elements in the first regions.

4. The power semiconductor module of claim 2 , comprising:
the wide bandgap semiconductor elements in the second regions being disposed between the first regions and each of two adjoining outer edges of the insulative substrates.

5. The power semiconductor module of claim 1 , comprising:
the wide bandgap semiconductor elements in the second region being disposed between the first region and each of two adjoining outer edges of the insulative substrate.

6. The power semiconductor module according to claim 1 , wherein the number of the wide bandgap semiconductor elements is larger than that of the Si semiconductor elements.

7. The power semiconductor module according to claim 1 , wherein
the Si semiconductor elements are switching elements; and
the wide bandgap semiconductor elements are diode elements.

8. The power semiconductor module according to claim 1 , wherein,
the Si semiconductor elements are diode elements; and
the wide bandgap semiconductor elements are switching elements.

9. A power semiconductor module comprising:
a plurality of silicon (Si) semiconductor elements, the Si semiconductor elements placed in a first region which is a central region of the power semiconductor module; and
a plurality of wide bandgap semiconductor elements, the wide bandgap semiconductor elements placed in a second region which is a region other than the first region;
wherein the wide bandgap semiconductor elements surround all sides of the Si semiconductor elements.

10. The power semiconductor module according to claim 9 , further comprising an insulating substrate where both of the Si semiconductor elements and the wide bandgap elements are located.

11. The power semiconductor module according to claim 9 , wherein a number of the wide bandgap semiconductor elements is larger than that of the Si semiconductor elements.

12. The power semiconductor module according to claim 9 , wherein
the Si semiconductor elements are switching elements; and
the wide bandgap semiconductor elements are diode elements.

13. The power semiconductor module according to claim 9 , wherein
the Si semiconductor elements are diode elements; and
the wide bandgap semiconductor elements are switching elements.

14. A power semiconductor module comprising:
a plurality of insulating substrates;
a plurality of silicon (Si) semiconductor elements disposed on each of the substrates; and
a plurality of wide bandgap semiconductor elements disposed on one side of each of the substrates; wherein
the plurality of substrates are arranged such that the Si semiconductor elements are disposed between the wide bandgap semiconductor elements.

15. The power semiconductor module according to claim 14 , wherein a number of the wide bandgap semiconductor elements is larger than that of the Si semiconductor elements.

16. The power semiconductor module according to claim 14 , wherein
the Si semiconductor elements are switching elements; and
the wide bandgap semiconductor elements are diode elements.

17. The power semiconductor module according to claim 14 , wherein
the Si semiconductor elements are diode elements; and
the wide bandgap semiconductor elements are switching elements.

18. The power semiconductor module of claim 14 , wherein
the insulating substrates on which the Si semiconductor elements and the wide band gap semiconductor elements are mounted are placed on one and the same baseplate.

19. The power semiconductor module of claim 14 , wherein
the wide band gap semiconductor elements are disposed in an L-character shape on the each of the insulating substrates.

20. The power semiconductor module of claim 14 , wherein the plurality of wide band gap semiconductor elements are disposed on two sides of each of the substrates and;
the plurality of substrates are arranged to make the wide bandgap semiconductor elements surround the Si semiconductor elements.

Assignees

• Miki Takayoshi
• Nakayama Yasushi
• Oi Takeshi
• Tada Kazuhiro
• Idaka Shiori
• Hasegawa Shigeru
• Kobayashi Tomohiro
• Nakashima Yukio
• Mitsubishi Electric Corp

Inventors

• Miki Takayoshi
• Nakayama Yasushi
• Oi Takeshi
• Tada Kazuhiro
• Idaka Shiori
• Hasegawa Shigeru
• Kobayashi Tomohiro
• Nakashima Yukio

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/07554

  changes in dispositions · CPC title

• H10W72/5475

  multiple bond wires connected to common bond pads at both ends of the wires · CPC title

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

• H10W40/10

  Arrangements for heating · CPC title