Method of designing impedance transformation circuit

US9298873B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9298873-B2
Application numberUS-201514636393-A
CountryUS
Kind codeB2
Filing dateMar 3, 2015
Priority dateSep 28, 2012
Publication dateMar 29, 2016
Grant dateMar 29, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To design an impedance transformation circuit, a transformer ratio of a transformer circuit is determined according to an impedance ratio. A coupling coefficient between a first inductance element and a second inductance element, an inductance of the first inductance element, and an inductance of the second inductance element are determined. A shape of the second inductance element is determined. A shape of the first inductance element is determined such that the first inductance element includes at least two layers of loop conductors, and an interlayer distance between the loop conductors is determined such that an inductance value of the first inductance element is a desired value.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of designing an impedance transformation circuit including a transformer circuit connected between a first high-frequency circuit and a second high-frequency circuit and a first inductance element and a second inductance element coupled to each other, wherein the first inductance element and the second inductance element are interlayer-coupled to each other, the second inductance element includes at least two layers of loop conductors, and the loop conductors sandwich the first inductance element in a stacking direction, the method comprising the steps of: a first step of determining a required transformer ratio of the transformer circuit based on an impedance of the first high-frequency circuit and an impedance of the second high-frequency circuit; a second step of determining a coupling coefficient between the first inductance element and the second inductance element, an inductance of the first inductance element, and an inductance of the second inductance element; a third step of determining a shape of the second inductance element; a fourth step of determining a shape of the first inductance element such that the first inductance element is formed of at least two layers of loop conductors, and determining an interlayer distance between the loop conductors such that an inductance value of the first inductance element is a desired value; and a fifth step of fabricating the impedance transformation circuit based on results of the first, second, third, and fourth steps. 2. The method of designing an impedance transformation circuit according to claim 1 , wherein the first inductance element and the second inductance element are formed in a same area or substantially a same area as viewed from a top and to have a loop shape with less than one turn per layer. 3. The method of designing an impedance transformation circuit according to claim 1 , wherein the first inductance element is formed of a first loop-shaped conductor and a second loop-shaped conductor adjacent to each other in the stacking direction, and the second inductance element is formed of a third loop-shaped conductor and a fourth loop-shaped conductor disposed to sandwich the first loop-shaped conductor and the second loop-shaped conductor in the stacking direction. 4. The method of designing an impedance transformation circuit according to claim 3 , wherein the third step includes determining shapes of the third loop-shaped conductor and the fourth loop-shaped conductor such that the inductance of the second inductance element has a value determined in the second step; and the fourth step includes determining shapes of the first loop-shaped conductor and the second loop-shaped conductor such that the third loop-shaped conductor and the fourth loop-shaped conductor have a same shape or substantially a same shape, determining an interlayer distance between the first loop-shaped conductor and the second loop-shaped conductor such that the inductance of the first inductance element has a value determined in the second step, and determining an interlayer distance between the first loop-shaped conductor and the third loop-shaped conductor and an interlayer distance between the second loop-shaped conductor and the fourth loop-shaped conductor such that the coupling coefficient between the first inductance element and the second inductance element has a value determined in the second step. 5. The method of designing an impedance transformation circuit according to claim 3 , wherein the first loop-shaped conductor and the second loop-shaped conductor are connected in parallel. 6. The method of designing an impedance transformation circuit according to claim 3 , wherein the first loop-shaped conductor and the second loop-shaped conductor are connected in series. 7. The method of designing an impedance transformation circuit according to claim 6 , wherein a portion of the first loop-shaped conductor and a portion of the second loop-shaped conductor are connected in parallel. 8. The method of designing an impedance transformation circuit according to claim 3 , wherein the third loop-shaped conductor and the fourth loop-shaped conductor are connected in parallel. 9. The method of designing an impedance transformation circuit according to claim 3 , wherein the third loop-shaped conductor and the fourth loop-shaped conductor are connected in series. 10. The method of designing an impedance transformation circuit according to claim 9 , wherein a portion of the third loop-shaped conductor and a portion of the fourth loop-shaped conductor are connected in parallel. 11. The method of designing an impedance transformation circuit according to claim 3 , further comprising forming via conductors to connect respective ones of the first, second, third and fourth loop-shaped conductors. 12. The method of designing an impedance transformation circuit according to claim 1 , wherein the first high-frequency circuit is a feed circuit and the second high-frequency circuit is an antenna element; a first end of the first inductance element is connected to the feed circuit and a second end of the first inductance element is connected to the antenna element; and a first end of the second inductance element is connected to the antenna element and a second end of the second inductance element is connected to ground. 13. The method of designing an impedance transformation circuit according to claim 12 , wherein the antenna element is a T-branch antenna element. 14. The method of designing an impedance transformation circuit according to claim 1 , wherein the first high-frequency circuit is a feed circuit and the second high-frequency circuit is an antenna element; a first end of the first inductance element is connected to ground and a second end of the first inductance element is connected to the antenna element; and a first end of the second inductance element is connected to the feed circuit and a second end of the second inductance element is connected to the antenna element. 15. The method of designing an impedance transformation circuit according to claim 14 , wherein the antenna element is a T-branch antenna element. 16. The method of designing an impedance transformation circuit according to claim 1 , further comprising the step of providing the impedance transformation circuit in a multiband support antenna apparatus. 17. The method of designing an impedance transformation circuit according to claim 16 , wherein the multiband support antenna apparatus is configured to support at least two frequency bands.

Assignees

Inventors

Classifications

  • Circuit design at the analogue level · CPC title

  • Manufacturability analysis or optimisation for manufacturability · CPC title

  • on stacked layers · CPC title

  • H01Q1/00Primary

    Details of, or arrangements associated with, antennas (arrangements for varying orientation of directional pattern H01Q3/00) · CPC title

  • Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range (resonant circuits H03H) · CPC title

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What does patent US9298873B2 cover?
To design an impedance transformation circuit, a transformer ratio of a transformer circuit is determined according to an impedance ratio. A coupling coefficient between a first inductance element and a second inductance element, an inductance of the first inductance element, and an inductance of the second inductance element are determined. A shape of the second inductance element is determine…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01Q1/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).