Method and device for storing data in a flash memory using address mapping for supporting various block sizes

Patent metadata

Field	Value
Publication number	US-9298384-B2
Application number	US-201214346448-A
Country	US
Kind code	B2
Filing date	Aug 31, 2012
Priority date	Sep 23, 2011
Publication date	Mar 29, 2016
Grant date	Mar 29, 2016

Abstract

The present invention relates to a method and device for storing data in a flash memory using address mapping for supporting various block sizes. A storage device determines the size of a block that a host system uses on the basis of the size of data that the host system requests and uses the determined block size as a mapping unit. Additionally, the storage device divides a logical address space into at least one area, and maps an address using the minimum units of different mappings in each divided area.

First claim

What is claimed is:

1. A storage device comprising:
a flash memory to store data;
a block size determining unit to determine a size of a block used by a host system connected to the storage device; and
an address mapping management unit to map a logical address of the storage device to a physical address of the flash memory, using the determined size as a unit of mapping.

2. The device of claim 1 , wherein the block size determining unit determines the size of the block used by the host system in response to a data access request of the host system.

3. The device of claim 1 , wherein the block size determining unit determines the size of the block used by the host system based on a quantity of data requested by the data access request.

4. The device of claim 1 , wherein the block size determining unit determines that the size of the block used by the host system corresponds to a minimum quantity of data among quantities of data requested by at least one data access request.

5. The device of claim 1 , wherein the size of the block is a size of a block used by a file system of the host system, or a database system of the host system.

6. The device of claim 1 , wherein a logical address space of the storage device is divided into at least one area,
wherein the block size determining unit determines the size of the block used by the host system, for each of the at least one area in order to access each of the at least one area, and
wherein the address mapping management unit maps the logical address corresponding to a predetermined area among the at least one area, to a physical address of the flash memory using the determined size.

7. A storage device comprising:
a flash memory to store data;
a block size determining unit to divide a logical address space of the storage device into at least one area, and determine a minimum unit of mapping to be used for each of the at least one area; and
an address mapping management unit to map a logical address corresponding to a predetermined area among the at least one area, on a physical address of the flash memory using the determined minimum unit of mapping.

8. The device of claim 7 , wherein the address mapping management unit manages each of the at least one area using a range mapping having a different fixed size unit, and
wherein the fixed size unit is the minimum unit of mapping to be used for each of the at least one area.

9. The device of claim 7 , wherein the block size determining unit manages an area table storing a pointer indicating mapping information on each of the at least one area and the minimum unit of mapping to be used for each of the at least one area, and
wherein the address mapping management unit manages a range mapping tree storing the mapping information on each of the at least one area.

10. The device of claim 9 , wherein the range mapping tree is extended based on a pattern of a data write request requested from a host system for an area corresponding to the range mapping tree, and
wherein when a size of the range mapping tree is greater than or equal to a predetermined size, the address mapping management unit converts a predetermined portion of the range mapping tree into a fixed size unit table indicating at least one fixed size unit.

11. The device of claim 10 , wherein the flash memory stores the area table, the range mapping tree, and the fixed size unit table, and
wherein the storage device further comprises a random-access memory (RAM) to cache the area table, the range mapping tree, and the fixed size unit table.

12. The device of claim 7 , wherein the block size determining unit determines the minimum unit of mapping to be used for each of the at least one area, based on a quantity of data used by the host system in order to access each of the at least one area.

13. The device of claim 12 , wherein the minimum unit of mapping is a size of a block used by a file system of the host system, or a database system of the host system for each of the at least one area.

14. An address mapping method of a storage device using a flash memory, the method comprising:
determining a size of a block used by a host system connected to a storage device; and
mapping a logical address of the storage device to a physical address of the flash memory, using the determined size.

15. An address mapping method of a storage device using a flash memory, the method comprising:
dividing a logical address space of the storage device into at least one area and determining a minimum unit of mapping to be used for each of the at least one area; and
mapping a logical address corresponding to a predetermined area among the at least one area, to a physical address of the flash memory using the determined size.

Assignees

• Kang Soo Yong
• Won You Jip
• Cha Jae Hyuk
• Park Sung Min
• Yoon Sung Roh
• Choi Jong Moo
• Iucf Hyu

Inventors

• Kang Soo Yong
• Won You Jip
• Cha Jae Hyuk
• Park Sung Min
• Yoon Sung Roh
• Choi Jong Moo

Classifications

• G06F3/0611

  in relation to response time · CPC title

• G06F12/0246 Primary

  in block erasable memory, e.g. flash memory · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/064 Primary

  Management of blocks · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title