Bonding wire to bonding pad

Patent metadata

Field	Value
Publication number	US-9293436-B2
Application number	US-201514711014-A
Country	US
Kind code	B2
Filing date	May 13, 2015
Priority date	May 14, 2014
Publication date	Mar 22, 2016
Grant date	Mar 22, 2016

Abstract

A manufacturing method of a BGA, includes the steps of: providing a semiconductor chip having electrode pads; and removing a natural oxide film formed on the surface of each of the electrode pads. Further, a first film comprised of a conductive member is formed on the surface of the electrode pad exposed by removing the natural oxide film, a wire is connected with the first film, and part of the wire is brought into contact with the electrode pad to form an alloy layer at the interface between the wire and the electrode pad. The crystal structure of the first film is comprised of a body-centered cubic lattice or a hexagonal close-packed lattice. The cost of the semiconductor device can be reduced while the bonding reliability of wire bonding of the semiconductor device is ensured.

First claim

What is claimed is:

1. A manufacturing method of a semiconductor device, comprising the steps of:
(a) providing a semiconductor chip including an electrode pad;
(b) after the step (a), removing a natural oxide film formed on the surface of the electrode pad;
(c) after the step (b), forming a pad-cover film, comprised of a conductive member, over the surface of the electrode pad exposed by removing the natural oxide film; and
(d) after the step (c), connecting a part of wire, comprised of a conductive material containing no gold, to the pad-cover film, and forming an alloy layer at the interface between the wire and the electrode pad, wherein
the crystal structure of the pad-cover film is comprised of one of a body-centered cubic lattice and a hexagonal close-packed lattice, and
in the step (d), the pad-cover film is broken to connect the wire with the electrode pad.

2. The manufacturing method of a semiconductor device according to claim 1 ,
wherein the pad-cover film is comprised of chromium, titanium or tungsten.

3. The manufacturing method of a semiconductor device according to claim 1 ,
wherein in the step (b), the natural oxide film is removed in a vacuum atmosphere, and
wherein in the step (c), the pad-cover film is formed in the vacuum atmosphere without making the vacuum atmosphere of the step (b) open to air.

4. The manufacturing method of a semiconductor device according to claim 3 ,
wherein in the step (b), the natural oxide film is removed by sputter etching.

5. The manufacturing method of a semiconductor device according to claim 1 ,
wherein in the step (c), the pad-cover film is formed over the entire surface of the electrode pad.

6. The manufacturing method of a semiconductor device according to claim 1 ,
wherein the electrode pad is comprised of a material containing aluminum as the main component, and
wherein the wire is comprised of a material containing copper as the main component.

7. A semiconductor device comprising:
a semiconductor chip including:
a main surface, and
a plurality of electrode pads formed on the main surface;

a plurality of leads arranged around the semiconductor chip; and
a plurality of wires, comprised of a conductive material containing no gold, electrically connecting the electrode pads with the leads, respectively,
wherein a plurality of pad-cover films, comprised of a conductive member, are formed on surfaces the plurality of electrode pads, respectively,
wherein the plurality of wires are directly connected with the plurality of electrode pads through broken areas of the pad-cover films where the electrode pads are exposed such that alloy layers are formed at the interfaces between the plurality of wires and the plurality of electrode pads, respectively, and
wherein the crystal structure of each of the pad-cover films is comprised of one of a body-centered cubic lattice and a hexagonal close-packed lattice.

8. The semiconductor device according to claim 7 ,
wherein the pad-cover film is comprised of chromium, titanium or tungsten.

9. The semiconductor device according to claim 7 ,
wherein the electrode pad is comprised of aluminum and the wire is comprised of a material containing copper as the main component.

Assignees

• Renesas Electronics Corp

Inventors

• Akiba Toshihiko
• Tobita Akihiro
• Yagyu Yuki

Classifications

• H10P74/273

  Interconnections for measuring or testing, e.g. probe pads · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title