Neural network computation circuit, control circuit therefor, and control method therefor
US-2024411520-A1 · Dec 12, 2024 · US
US9293199B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9293199-B2 |
| Application number | US-201414296507-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 5, 2014 |
| Priority date | Jun 14, 2013 |
| Publication date | Mar 22, 2016 |
| Grant date | Mar 22, 2016 |
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A phase-change memory cell for storing information in a plurality of programmable cell states. The memory cell includes: a phase-change material located between a first electrode and a second electrode for applying a read voltage to the phase-change material to read a programmed cell state; and an electrically-conductive component extending in a direction between the first and second electrodes in contact with the phase-change material and arranged to present, to a cell current produced by the read voltage, a lower-resistance current path than an amorphous phase of the phase-change material in any of the plurality of programmable cell states, said current path having a length dependent on a size of said amorphous phase, wherein a volume of the electrically-conductive component is greater than about half that of said phase-change material.
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What is claimed is: 1. A phase-change memory cell for storing information in a plurality of programmable cell states, the memory cell comprising: a phase-change material located between a first electrode and a second electrode for applying a read voltage to the phase-change material to read a programmed cell state; and an electrically-conductive component extending in a direction between the first and second electrodes in contact with the phase-change material and arranged to pr…
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