Digital switching converter control

Patent metadata

Field	Value
Publication number	US-9292028-B2
Application number	US-201213624696-A
Country	US
Kind code	B2
Filing date	Sep 21, 2012
Priority date	Sep 23, 2011
Publication date	Mar 22, 2016
Grant date	Mar 22, 2016

Abstract

A control circuit can control the operation of a switching converter to provide a regulated load current to a load. The switching converter includes an inductor and a high-side and a low side-transistor for switching the load current provided via the inductor. A digital modulator is configured to provide a modulated signal having a duty cycle determined by a digital duty cycle value. A current sense circuit is coupled to at least one of the transistors and is configured to regularly sample a load current value. A comparator is coupled to the current sense circuit and is configured to compare the sampled load current value with a first threshold and to provide a respective comparator output signal. A regulator is configured to receive the comparator output signal and to calculate an updated digital duty cycle value.

First claim

What is claimed is:

1. A control circuit for controlling the operation of a switching converter to provide a regulated load current to a load, the switching converter comprising an inductor, a high-side transistor and a low-side transistor for switching the load current flowing through the inductor, the control circuit comprising:
a digital modulator configured to provide a modulated signal having a duty cycle determined by a digital duty cycle value;
a current sense circuit configured to be coupled to at least one of the high-side transistor and the low-side transistor and configured to regularly sample a load current value;
a comparator coupled to the current sense circuit and configured to:
compare the sampled load current value with a first threshold, a second threshold and a third threshold, and
provide a respective comparator output signal, wherein
the first threshold is dependent on a defined desired output current,
the comparator output signal indicates whether the sampled current value is less than or greater than the defined desired output current
the comparator output signal further indicates whether the sampled load current differs from the defined desired output current by more than an amount determined by the second and third threshold, respectively,
the comparator output signal is set to a first value when the sampled load current is below the second threshold, to a second value when the sampled load current is between the second threshold and the first threshold, to a third value when the sampled load current is between the first threshold and the third threshold, and to a fourth value when the sampled load current is higher than the third threshold, wherein the first, second, third and fourth values nonlinearly depend on the sampled load current value; and

a regulator configured to receive the comparator output signal and to calculate an updated digital duty cycle value.

2. The control circuit of claim 1 , wherein:
the high-side transistor comprises a first load path terminal coupled to a first power supply node and a second load path terminal coupled to the inductor;
the low-side transistor comprises a first load path terminal coupled to a second power supply node and a second load path terminal coupled to the inductor;
the current sense circuit comprises a sense transistor having a control node configured to be coupled to a control node of the at least one of the high-side transistor and the low-side transistor, a first load path terminal coupled to at least one of the first power supply node and the second power supply node, and a second load path terminal coupled to a current source; and
the comparator comprises a first input terminal coupled to the second load path terminal of the at least one high-side transistor and the low-side transistor and a second input terminal coupled to the second load path terminal of the sense transistor.

3. The control circuit of claim 1 , wherein the regulator has a integrating path and a proportional path, both paths including a gain and the proportional path including a saturation element.

4. The control circuit of claim 1 , wherein the comparator output signal represents a nonlinear quantization of the load current, the nonlinear quantization being coarse such that the regulated load current performs a limit cycle across the defined desired output current with a frequency corresponding to a modulation frequency of the digital modulator.

5. The control circuit of claim 1 , wherein
the digital modulator is configured to set the modulated signal to such a value that a flow of the load current is stopped in response to a dim control signal, and
wherein the regulator is configured to maintain the digital duty cycle value while the dim control signal stops the flow of the load current.

6. The control circuit of claim 5 , wherein the dim control signal is a modulated signal with a modulation period being longer by a factor of at least 10 than a modulation period of the digital modulator.

7. The control circuit of claim 2 , wherein a current of the current source corresponds to the first threshold.

8. A method for controlling the operation of a switching converter to provide a regulated load current to a load, the switching converter comprising an inductor and a high-side transistor and a low-side transistor for switching the load current flowing through the inductor; the method comprising:
providing a modulated signal that has a duty cycle determined by a digital duty cycle value;
regularly sampling a load current value;
comparing the sampled load current value with a first threshold to provide a respective comparison output signal, wherein the first threshold is dependent on a defined desired output current and the comparison output signal is indicative of whether the sampled current value is lower or higher than the defined desired output current, wherein comparing comprises
providing the comparison output signal and a predefined output value that depends on a state of a state machine, and
comparing the sampled load current value with a variable threshold that depends on the state of the state machine, wherein each state of the state machine is associated with a defined output value and a defined threshold, wherein a number of defined output values equals a number of defined thresholds plus one; and

calculating an updated digital duty cycle value from the comparison output current signal in accordance with a given control law.

9. The method of claim 8 , wherein sampling a load current value comprises sampling a source or drain potential of the high-side transistor or the low-side transistor.

10. The method of claim 9 , wherein comparing the sampled load current value with a first threshold comprises comparing the source or drain potential of the high-side or low-side transistor with a respective source or drain potential of a corresponding sense transistor,
wherein the drain or source current of the sense transistor is set to a value representing the first threshold.

11. The method of claim 8 wherein sampling a load current value comprises sampling a load current value at the low-side transistor or at the high-side transistor, dependent on the digital duty cycle value.

Assignees

• Infineon Technologies Ag

Inventors

• Capodivacca Giovanni
• Milanesi Paolo
• Scenini Andrea

Classifications

• H05B45/10

  Controlling the intensity of the light · CPC title

• G05F1/468 Primary

  characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title

• H05B33/0815

  Electricity · mapped topic

• H05B33/0854

  Electricity · mapped topic

• H05B45/3725

  Switched mode power supply [SMPS] · CPC title