Server-centric high performance network architecture for modular data centers

Patent metadata

Field	Value
Publication number	US-9288134-B2
Application number	US-201113273143-A
Country	US
Kind code	B2
Filing date	Oct 13, 2011
Priority date	Jan 9, 2009
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

Disclosed are systems and methods for network architecture that is a server-centric network architectural design.

First claim

What is claimed is:

1. A method comprising:
under control of one or more processors configured with executable instructions:
assigning a first predetermined number of network ports to a plurality of servers of a network architecture;
arranging a plurality of switches having a second predetermined number of network ports into a predetermined number of levels; and
connecting the plurality of switches to the plurality of servers using bi-directional links, such that individual ones of the plurality of switches are not directly connected to another switch of the plurality of switches and individual ones of the plurality of servers are not directly connected to another server of the plurality of servers.

2. The method of claim 1 , further comprising identifying individual servers within the plurality of servers with an address, the address comprising digits.

3. The method of claim 2 , wherein a number of differences between first digits of an address of a first server within the plurality of servers and second digits of an address of a second server within the plurality of servers indicates a minimum number of switches indirectly connected between the first server and the second server.

4. The method of claim 2 , wherein addresses of two adjacent servers of the plurality of servers uniquely identify an address of a switch between the two adjacent servers.

5. The method of claim 1 , wherein a total number of the plurality of servers in the network architecture is based at least on the second predetermined number of network ports and the predetermined number of levels.

6. The method of claim 1 , further comprising:
determining a plurality of paths that exist between a first server and a second server within the plurality of servers; and
probing, at the first server, the plurality of paths to determine a path for traversing a packet between the first server and the second server based at least in part on a bandwidth of individual ones of the plurality of paths.

7. The method of claim 6 , further comprising encoding the path into a packet header of the packet.

8. The method of claim 6 , wherein the probing comprises determining whether to buffer the packet.

9. The method of claim 6 , wherein the probing comprises employing a Breadth First Search (BFS) algorithm to determine the path for traversing the packet.

10. A system comprising:
one or more processors; and
memory, communicatively coupled to the one or more processors, storing instructions that, when executed by the one or more processors, configure the one or more processors to perform acts comprising:
connecting a plurality of switches to a plurality of servers, individual ones of the plurality of switches having no direct connection with another switch of the plurality of switches and individual ones of the plurality of servers having no direct connection with another sever of the plurality of servers; and
identifying individual ones of the plurality of servers with a first address and a second address, the first address and the second address comprising digits, wherein a number of differences between first digits of the first address of a first server of the plurality of servers and second digits of the second address of a second server of the plurality of servers indicates a minimum number of switches indirectly connected between the first server and the second server.

11. The system of claim 10 , wherein addresses of two adjacent servers of the plurality of servers uniquely identify a third address of a switch between the two adjacent servers.

12. The system of claim 10 , wherein the acts further comprise:
determining a plurality of paths that exist between a first server and a second server of the plurality of servers; and
probing, at the first server, the plurality of paths to determine a path for traversing a packet between the first server and the second server.

13. The system of claim 12 , wherein the acts further comprise encoding the path into a packet header of the packet.

14. The system of claim 12 , wherein the probing comprises determining whether to buffer the packet.

15. The system of claim 12 , wherein the probing comprises employing a Breadth First Search (BFS) algorithm to determine the path for traversing the packet.

16. One or more hardware computer-readable media configured with computer executable instructions that, when executed by one or more hardware processors, configure the one or more hardware processors to perform acts comprising:
connecting a plurality of switches to a plurality of servers, individual ones of the plurality of switches having no direct connection with another switch of the plurality of switches and individual ones of the plurality of servers having no direct connection to another sever of the plurality of servers; and
identifying individual ones of the plurality of servers with a first address and a second address, the first address and second address comprising digits, wherein a number of differences between first digits of the first address of a first server of the plurality of servers and second digits of the second address of a second server of the plurality of servers indicates a minimum number of switches indirectly connected between the first server and the second server.

17. The one or more hardware computer-readable media of claim 16 , wherein addresses of two adjacent servers of the plurality of servers uniquely identify a third address of a switch between the two adjacent servers.

18. The one or more hardware computer-readable media of claim 16 , wherein the acts further comprise:
determining a plurality of paths that exist between a first server and a second server of the plurality of servers; and
probing, at the first server, the plurality of paths to determine a path for traversing a packet between the first server and the second server.

19. The one or more hardware computer-readable media of claim 18 , wherein the acts further comprise encoding the path into a packet header of the packet.

20. The one or more hardware computer-readable media of claim 18 , wherein the probing comprises determining whether to buffer the packet.

Assignees

• Guo Chuanxiong
• Lv Guohan
• Li Dan
• Wu Haitao
• Shi Yunfeng
• Zhang Danfeng
• Zhang Yongguang
• Lu Songwu
• Microsoft Technology Licensing Llc

Inventors

• Guo Chuanxiong
• Lv Guohan
• Li Dan
• Wu Haitao
• Shi Yunfeng
• Zhang Danfeng
• Zhang Yongguang
• Lu Songwu

Classifications

• H04L45/745

  Address table lookup; Address filtering · CPC title

• H04L49/10

  characterised by the switching fabric construction · CPC title

• H04L45/38

  Flow based routing · CPC title

• H04L45/34 Primary

  Source routing · CPC title

• H04L45/125 Primary

  based on throughput or bandwidth · CPC title