Nanostructured device

Patent metadata

Field	Value
Publication number	US-9287443-B2
Application number	US-201414174015-A
Country	US
Kind code	B2
Filing date	Feb 6, 2014
Priority date	Dec 19, 2008
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

A nanostructured device according to the invention comprises a first group of nanowires protruding from a substrate where each nanowire of the first group of nanowires comprises at least one pn- or p-i-n-junction. A first contact, at least partially encloses and is electrically connected to a first side of the pn- or p-i-n-junction of each nanowire in the first group of nanowires. A second contacting means comprises a second group of nanowires that protrudes from the substrate, and is arranged to provide an electrical connection to a second side of the pn- or p-i-n-junction.

First claim

The invention claimed is:

1. A method of forming a nanostructured device, comprising the steps of:
providing a substrate
growing a first group of nanowires and a second group of nanowires on the substrate or a buffer layer on the substrate,
forming a pn- or p-i-n-junction in each of the nanowires of the first and second groups of nanowires,
forming a first contact that at least partially encloses and electrically connects to a first side of the pn or p-i-n junction of each nanowire in only the first group of nanowires, and
forming a second contact that at least partly encloses only the nanowires of the second group of nanowires, whereby the second contact forms part of an electrical connection to a second side of the pn- or p-i-n-junction of each nanowire in the first group of nanowires,
wherein the second group of nanowires are electrically inactive.

2. Method of forming a nanostructured device according to claim 1 , wherein the step of growing comprises growing a shell layer enclosing the nanowires.

3. Method of forming a nanostructured device according to claim 1 , wherein the step of forming the second contact comprises uncovering the nanowire from surrounding layers on the second group of nanowires, and forming a second contact that at least partly encloses the nanowires of the second group of nanowires.

4. The method according to claim 1 , wherein the buffer layer or the substrate comprises a GaN buffer layer or a semiconductor substrate, and the second contact is in direct contact with at least one of the GaN buffer layer or the semiconductor substrate.

5. The method according to claim 1 , wherein the first and second groups of nanowires are formed simultaneously in the same process step.

6. The method according to claim 1 , wherein a nanowire core is exposed in an end portion of the second group of nanowires.

7. The method according to claim 6 , wherein a predefined portion of the nanowires of the first and second group of nanowires is removed using at least one of chemical mechanical polishing (CMP) or etching.

Assignees

• Glo Ab

Inventors

• Konsek Steven Louis
• Martynov Yourii
• Ohlsson Jonas
• Hanberg Peter Jesper

Classifications

• H10P14/3462

  Nanowires · CPC title

• H10D64/23

  Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes · CPC title

• H10D62/118

  Nanostructure semiconductor bodies · CPC title

• H10D64/205

  Nanosized electrodes, e.g. nanowire electrodes · CPC title

• H10D62/122

  oriented at angles to substrates, e.g. perpendicular to substrates · CPC title